ASIC Verification Engineer jobs in Massachusetts

Sr. ASIC Design Engineer, Blink/Ring ASIC Team

North Reading, Massachusetts

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Today

Join the team which delivers highly differentiated silicon into Amazon Cameras and Doorbells. Our team works on state-of-the art SoCs in a vertically integrated team environment to deliver products our customers love. Drive early architectural and micro-architectural trade-offs to reduce time-to-revenue by shortening the time to revenue. Innovators will be delighted with our integrated verification/validation environment that is used to perform architectural modeling to post-silicon validation.

Full-time

USD 143,300.00 per year

Principal Digital ASIC Designer Engineer

Cambridge, Massachusetts

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Today

Location: Cambridge, MA Salary: $175,000.00 USD Annually - $200,000.00 USD Annually Description: We're looking for a Senior Digital ASIC Designer to join our multidisciplinary engineering teams and develop high-performance digital ASICs using advanced technologies. In this role, you'll own the design process from RTL development through synthesis, contribute to architectural innovations, and optimize digital systems for performance, power, and scalability. You'll collaborate with cross-func

Contract

USD 175,000.00 - 200,000.00 per year

Senior Analog/Mixed Signal ASIC Design Engineer

Cambridge, Massachusetts

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Today

Security clearance: Ability to obtain and maintain a Secret clearance required We are seeking a Senior Analog/Mixed Signal ASIC Design Engineer to join our team in the Silicon Architecture group. Members of our group lead the design of integrated circuits from conceptual phases through detailed design, implementation, verification, test and delivery to our customers. Designers in the Silicon Architecture group are responsible for developing initial architectural concepts and vetting them through

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Full-time

$180,000 - $220,000

Verification Engineer

Remote

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8d ago

Verification Engineer 12 months -Contract If the candidate is local to the bay area, we would like them to be hybrid. If they are in another state 100% remote is fine. UVM - System Verilog 5+ years work experience Worked on complex SoC Strong computer architecture knowledge Prefer DRAM / Memory Controller experience B.S. in EE or Computing preferred JOB DUTIES: Participate in the functional verification of a block(s) of complex ASICs and/or IP cores for a combined CPU/GPU development effort.

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Contract

$80 - $90

Senior ASIC Clock Engineer

Remote or Santa Clara, California

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Today

NVIDIA Networking Clock design team is looking for experienced top notch ASIC design engineer to work on next generation of NVIDIA Networking chips. We're looking for profound and multi-disciplinary background in Clock design domains to lead Clocks Micro-Architecture activities. This role requires working with multiple teams as Architecture, IP, Physical design, Timing and Post-Si teams. Complexity of clocking scheme has grown substantially over recent chip generations with increased focus on pe

Full-time

USD 168,000.00 per year

Senior ASIC Synthesis Engineer

Remote or Santa Clara, California

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Today

Come be a part of new process technology adoption by joining NVIDIA's Advanced Technology Group! Work as part of the advanced technology team to optimize design tradeoffs and methodology on next generation CMOS technology. We are looking for a Senior ASIC Synthesis Engineer to join our dynamic and growing team! If you are problem solver and highly motivated individual searching for a collaborative and exciting role, join us today. We encourage applicants with a history of proven success working

Full-time

USD 168,000.00 per year

Verification Engineer, CPU - New College Grad 2025

Westford, Massachusetts

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Today

We are now looking for a Verification Engineer, CPU - New College Grad. NVIDIA is currently seeking a Verification Engineer with strong CPU and verification fundamentals to work in NVIDIA's CPU verification team. NVIDIA builds CPUs that power the coming wave of self-driving cars with high-end SoCs such as Xavier ( Xavier has a custom "Denver" class CPU which provides high-end performance while being aligned with stringent automotive standards such as ISO26262. What you'll be doing: Partner alo

Full-time

USD 96,000.00 per year

Sr. ASIC Design Engineer, Blink/Ring ASIC Team

North Reading, Massachusetts

•

Today

Full-time

USD 143,300.00 per year

Senior Reset and Boot ASIC Engineer

Remote or Santa Clara, California

•

Today

NVIDIA is looking for a Senior Reset and Boot ASIC Engineer to join our System ASIC team! NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 fueled the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI - the next era of computing. NVIDIA is a "learning machine" that constantly evolves by adapting to new opportunities that are hard to pursue, that o

Full-time

USD 136,000.00 per year

Senior Principal Engineer, Architecture ASIC / System

Westborough, Massachusetts

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Today

About Marvell Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and be

Full-time

USD 199,300.00 - 294,930.00 per year

Senior Analog/Mixed Signal ASIC Design Engineer

Boston, Massachusetts

•

Today

Job Description Summary: We are seeking a Senior Analog/Mixed Signal ASIC Design Engineer to join our team in the Silicon Architecture group. Members of our group lead the design of integrated circuits from conceptual phases through detailed design, implementation, verification, test and delivery to our customers. Designers in the Silicon Architecture group are responsible for developing initial architectural concepts and vetting them through modeling, analysis, and simulation. We work with both

Full-time

Analog Mixed-Signal ASIC Engineer

Cambridge, Massachusetts

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Today

Overview: Draper is an independent, nonprofit research and development company headquartered in Cambridge, MA. The 2,000+ employees of Draper tackle important national challenges with a promise of delivering successful and usable solutions. From military defense and space exploration to biomedical engineering, lives often depend on the solutions we provide. Our multidisciplinary teams of engineers and scientists work in a collaborative environment that inspires the cross-fertilization of ideas

Full-time

USD 75,000.00 - 150,000.00 per year

CPU Verification Engineer

Westford, Massachusetts

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Today

We are now looking for a CPU Verification Engineer! We are currently seeking a Verification Engineer with strong CPU and verification fundamentals to work in NVIDIA's CPU team. This position offers the opportunity to have real impact in a progressive, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. We have crafted a team of outstanding people stretching around the globe, whose mission is to

Full-time

USD 108,000.00 per year

Analog ASIC Validation Engineer

Remote or Odon, Indiana

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Today

Full-time

USD 82,300.00 per year

SoC Power Verification Engineer

Boxborough, Massachusetts

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Today

WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world's most important challenges. We strive for execution excellenc

Full-time

USD 149,800.00 per year

Lead ASIC & FPGA Design Engineer - Vitis HLS (HYBRID TELEWORK)

Remote or King of Prussia, Pennsylvania

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Today

Job Description We are committed to work-life balance by promoting this hybrid telework opportunity. These job requirements allow the employee to work at a Lockheed Martin-designated office or job site for part of their schedule and has a predefined regular, recurring telework schedule for the remaining part of their work schedule. Who We Are Lockheed Martin is dedicated to shaping, developing, & advancing technologies & capabilities with a focus on our customers' needs as part of our 21st Ce

Full-time

USD 123,500.00 - 217,695.00 per year

DFT Engineer

Remote

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8d ago

We are looking for an experienced DFT Engineer to join an ASIC Design Team on a 1-year contract. You will be responsible for ensuring testability throughout the ASIC design process while collaborating with cross-functional teams. Responsibilities: Lead DFT efforts in ASIC designs using VHDL, Verilog, or System Verilog. Follow company ASIC development process and implement DFT methodologies. Work with Cadence/ Mentor ATPG tools, hierarchical scan testing, JTAG, and memory/logic BIST. Collaborate

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Contract

Depends on Experience

Digital Design Engineer

Remote

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20d ago

SENIOR DIGITAL DESIGN ENGINEER 100% REMOTE - Within USA About the Role: What are the top non-negotiable skill sets required for this role? Experience in RTL coding, synthesis, and/or SoC IntegrationExperience in digital design ArchitectureFamiliarity with Verilog, System Verilog coding Duties: Contribute to the development of efficient Architectures and contribute to ASIC digital Architecture, design and verificationIPs integrationUnderstand Design for Verification conceptsDrive the top-level

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Contract

$85 - $100

Static Timing Analysis (STA) Engineer

Remote or Santa Clara, California

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Today

Role Title: Senior ASIC Engineer, Static Timing Analysis Location: Remote is an option for right fit / San Jose, CA / Austin, TX / Longmont, CO Duration: 12+ months contract Description: Responsible for the development of complex multi-mode / multi-corner timing constraints that are compatible for RTL and signoff Drive the pre-route timing checks and QoR clean up to eliminate SDC issues and ensure a quality handoff for STA checks Requires a mix of SDC knowledge, EDA tool competence and TCL bas

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Full-time, Third Party, Contract

DV Engineers DDR (either IP or SoC level experience)- Remote

Remote or California

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6d ago

Role: DV Engineers DDR (either IP or SoC level experience) Work Location: USA (Remote) Experience: 10+ Years Key Responsibilities: Define and implement verification strategies and test plans for DDR memory interface designs. Develop UVM/SystemVerilog-based testbenches and reusable verification components. Perform protocol-level verification for DDR memory interfaces and validate compliance. Collaborate with architecture, RTL, and system teams to understand design intent and corner cases. Own f

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Full-time, Third Party, Contract

$DOE

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ASIC Verification Engineer jobs in Massachusetts, USA