Tcl Jobs in Santa Clara, CA

21 - 40 of 42 Jobs

Physical DesignerJob Title - Physical Designer

Technical LinkCompany Name - Technical Link

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Remote

Contract

Onsite one week in AZ then fully remote 24 month contract We are looking for an experienced Physical Design Engineer The Work: Develop own physical design implementation of multi hierarchy low power designs including physical aware logic synthesis, design for testability, static timing analysis, power analysis, IR Drop, EM, in advanced technology nodesResolve power issues related to physical design, identify potential low power solutions, drive execution and methodology improvementsPerform compr

Cloverleaf DeveloperJob Title - Cloverleaf Developer

Logisoft Technologies IncCompany Name - Logisoft Technologies Inc

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Remote

Third Party, Contract

Job Title: Cloverleaf Developer Location: Remote Duration: Long Term Contract Experience: 7+ Years Required Skills: Cloverleaf, TCL or equivalent scripting language, HL7, X12, XML, VRL/FRL, SFTP Nice to have: Perl, Python, FHIR, webservice/SOAP, SQL, MQS We represent Logisoft Technologies, Inc. with pride; We present ourselves as a premiere Technology, Consulting, Product Development, and Software Services Company. Our Head Office is located in South Plainfield, NJ, and Our Offices location is i

Firmware EngineerJob Title - Firmware Engineer

EndoSec LLCCompany Name - EndoSec LLC

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Remote

Full-time

Firmware Engineer The Firmware Engineer will be responsible for designing, developing, testing, and maintaining embedded software that operates on microcontrollers and other hardware platforms. The primary focus will be on creating efficient, reliable, and scalable firmware solutions to enable the functionality of various electronic devices and systems. The candidate is expected to work with teams of diverse backgrounds including mathematicians, cryptographers, and physicists, as well as support

VLSI EngineerJob Title - VLSI Engineer

EndoSec LLCCompany Name - EndoSec LLC

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Remote

Full-time

VLSI Engineer The VLSI (Very Large-Scale Integration) Engineer is responsible for designing and developing integrated circuits (IC) and microchips using VLSI technology. The role involves working on complex digital and analog circuit designs and implementing them on semiconductor chips. The candidate is expected to work with teams of diverse backgrounds including mathematicians, cryptographers, and physicists, as well as support projects requiring an in-depth knowledge of fabrication processes,

Teamcenter AdministratorJob Title - Teamcenter Administrator

iTARKSCompany Name - iTARKS

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Remote

Contract

**Job Description: Teamcenter Administration** **Overview:** As a Teamcenter Administrator, you will be responsible for the administration, maintenance, and support of the Teamcenter PLM (Product Lifecycle Management) system. This role involves collaborating with various stakeholders to ensure the efficient operation of Teamcenter and its alignment with business objectives. **Key Responsibilities:** 1. **System Configuration and Customization:** - Configure and customize Teamcenter according t

RTL/ASIC Design EngineerJob Title - RTL/ASIC Design Engineer

NetwovenCompany Name - Netwoven

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San Jose, California, USA

Contract

KEY RESPONSIBILITIES: Microarchitecture development of IP subsystems Perform RTL design of digital components. Work with functional verification team to meet coverage and quality standards. Analyze/fix Lint and CDC errors of the components. Guarantee quality/timely deliverables meeting project s schedule. Help to improve/automate design process. Support post-silicon product bring-up/debug. PREFERRED EXPERIENCE: 10 years' experience in RTL coding Knowledge of PCIe Gen5 and PIPE specification Kno

ASIC Verification EngineerJob Title - ASIC Verification Engineer

Technical LinkCompany Name - Technical Link

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Santa Clara, California, USA

Full-time

Job Description Work with a dedicated team of engineers, using the latest verification practices, to verify the digital design intent of our SOC's at the block and system level. Engage early in the verification process to understand the verification requirements and participate in UVM or SystemVerilog testbench development. Responsible for creating tests to verify the SOC design at the system or block level and to implement checking mechanisms to ensure coverage closure.Job Requirements 15+ year

Principal Digital Design Engineer, SoCJob Title - Principal Digital Design Engineer, SoC

Island StaffingCompany Name - Island Staffing

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San Jose, California, USA

Full-time

As a Principal Engineer/Manager, Digital Design SoC, you will be leading with a small team of design engineers to develop novel SoC products for connectivity and communications. You will also be a key contributor to product definition and resulting detailed device performance and functional requirements specifications. You will support other discipline teams to bring the SoC device to successful mass production. This full-time position is based in San Jose, CA. Key Responsibilities Review and co

DFT EngineerJob Title - DFT Engineer

Talent Software Services, IncCompany Name - Talent Software Services, Inc

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Santa Clara, California, USA

Contract

DFT EngineerJob Summary: Talent Software Services is in search of a DFT Engineer for a contract position in Santa Clara, CA. The opportunity will be eight months with a strong chance for a long-term extension.Primary Responsibilities/Accountabilities: Stitching multiple scan chains across different IP(mixed signal) and clock domains. Scan vectors generation, and verification at different stages of the design. Validating scan coverage across design. Provide SoC (top) level constraints and partiti

Lab/System AdministratorJob Title - Lab/System Administrator

EITAcies, Inc.Company Name - EITAcies, Inc.

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Santa Clara, California, USA

Full-time, Part-time, Contract, Third Party

About US : Since 2008, EITACIES has been a beacon of innovation, crafting tailored tech solutions. From humble beginnings, we've grown globally, nurturing client relationships and adapting to digital shifts. Today, we're a tech powerhouse, delivering customized excellence from startups to Fortune 500, State & Federal clients. Responsibilities: Typical job responsibilities will include: Implementation and management of Lab Automation utilizing Spirent Velocity platform. Architecture and Design o

Cloverleaf DeveloperJob Title - Cloverleaf Developer

eTek IT Services, Inc.Company Name - eTek IT Services, Inc.

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Remote

Contract

Cloverleaf Developer remote role 12+ months contract Required: Cloverleaf, Tcl or equivalent scripting language, HL7, X12, XML, vrl/frl, SFTP Nice to have: Perl, Python, FHIR, webservice/SOAP, SQL, MQS

STA / SOC Integration EngineerJob Title - STA / SOC Integration Engineer

Technical LinkCompany Name - Technical Link

•

Remote

Contract

24 months Onsite 1 week initially in AZ, Fully remote after SOC Integration/STA/Synthesis Engineer Required Skills: Develop and own physical design implementation of multi-hierarchy low-power designs including physical-aware logic synthesis, design for testability, constraints, static timing analysis, formal verification, Gate level functional & timing ECO in advanced technology nodesDevelop & document STA & Synthesis strategies. Interact with methodology teams to address challenges related to

ASIC/SoC Design Verification EngineerJob Title - ASIC/SoC Design Verification Engineer

TetraMem IncCompany Name - TetraMem Inc

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Fremont, California, USA

Full-time

Responsibilities: Collaborate with design engineers and architects to define, document and implement detailed test plans for the SoC design verification. Build and maintain infrastructure/environment for automation verification of SoC architecture, function and performance. Develop reusable testbench, constrained-random/directed testcases, and verification associated behavioral module for both of block levels and system levels. Develop regression strategy, methodology and tools(scripts). Define

Sr. Verification EngineerJob Title - Sr. Verification Engineer

Xpeerant IncorporatedCompany Name - Xpeerant Incorporated

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Remote

Contract

Xpeerant prides itself in assisting our customers to achieve Market Window success by identifying and placing critical resource requirements. Securing the right talent is the most critical component of any project and directly relates to the success of any business. Market opportunities wait for no one. Finding the ideal fit is what Xpeerant has done for the last 26 years! We have Verification Engineer opportunities! If you meet the following description, let us hear from you! Job Description:

ASIC Verification (Fulltime)Job Title - ASIC Verification (Fulltime)

Technical LinkCompany Name - Technical Link

•

Remote

Full-time

Job Description Work with a dedicated team of engineers, using the latest verification practices, to verify the digital design intent of our SOC's at the block and system level. Engage early in the verification process to understand the verification requirements and participate in UVM or SystemVerilog testbench development. esponsible for creating tests to verify the SOC design at the system or block level and to implement checking mechanisms to ensure coverage closure.Job Requirements 15+ years

Senior ASIC / FPGA Design Verification EngineerJob Title - Senior ASIC / FPGA Design Verification Engineer

Technical LinkCompany Name - Technical Link

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Remote

Contract

6 Months Fully remote Verification RESPONSIBILITIES The senior verifier will be called upon to: develop SystemVerilog (or VHDL) test benches for the verification of ASICs or FPGAs;apply the various techniques and approaches of the Universal Verification Methodology (UVM);contribute to the development of the test infrastructure;document and report problems found to designers and assist them in identifying the source of the problems;support laboratory testing.QUALIFICATIONS Experience in writing

Physical Design EngineerJob Title - Physical Design Engineer

Xoriant CorporationCompany Name - Xoriant Corporation

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San Jose, California, USA

Contract

Job Title: Physical Design Engineer Location: San Jose, CA (hybrid) Duration: 6+ months (Possible Extension-Long Term Project) Rate: $100/hr on w2 Description Perform physical implementation in Synopsys tools (ICC2)Develop and maintain the tool flow to support the project.Work with Team to enhance PD methodology.Fixing DRC/LVS issuesFixing voltage drop violationsTiming ECOsRequirements Experience in advanced node processes 16nm and below.Experience with industry-standard tools, preference for Sy

Design for Test (DFT) EngineerJob Title - Design for Test (DFT) Engineer

Xoriant CorporationCompany Name - Xoriant Corporation

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San Jose, California, USA

Contract

Title: Design for Test (DFT) Engineer Location: San Jose, CA Duration: 6+ months (Possible Extension-Long Term Project) Rate: $100/hr on w2 Description Design for Test (DFT) Engineer 5 years experience with the following:ATPG (stuck, transition delay, bridge) with Synopsys Tetramax/Mentor TestKompressATPG pattern generation, coverage analysis and ATPG simulation.Ability to debug ATPG simulation failures is a plus.DFT insertion using DFT CompilerGood TCL and PERL scripting skillsMBIST insertion

PLM Teamcenter Consultant- Remote- TCICJob Title - PLM Teamcenter Consultant- Remote- TCIC

HirexCompany Name - Hirex

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Remote

Contract, Third Party

Job Role : PLM Teamcenter Consultant- with TCIC Location : Remote Duration : Long Term Contract Required Knowledge: ITK server-side coding experience with C and C++ including Teamcenter workflows ,Good Knowledge of TCIC , TCIC Silent ImportExperience in SQL, C++, Visual Basic, .NET, Java/JavaScript, TCL scripting and XML and the ability to easily pick up and understand another Object-Oriented programming languageExpertise in CATIA or other CAD integrations to Teamcenter Is highly desired, but no

ASIC Verification EngineerJob Title - ASIC Verification Engineer

Q1 Technologies, Inc.Company Name - Q1 Technologies, Inc.

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Remote or Santa Clarita, California, USA

Full-time, Third Party, Contract

Job Title : ASIC Verification Engineer Location: Bay Area, CA & Austin, Texas (Onsite only) Opening 10 Mandatory Skills: Design Verification, UVM, IP, SOC, System Verilog Job Description: Experience in pre-silicon RTL Verification /IP Verification / SOC verification Strong knowledge of System Verilog and working knowledge of recent verification methodologies (UVM) Domain expertise in one or more of the following areas System-on-a-chip verification with multiple CPUs and fixed function units