Verification Engineer Jobs in Massachusetts

1 - 20 of 33 Jobs

Senior ASIC Verification Engineer, Coherent High Speed InterconnectJob Title - Senior ASIC Verification Engineer, Coherent High Speed Interconnect

NVIDIA CorporationCompany Name - NVIDIA Corporation

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Remote or Santa Clara, California, USA

Full-time

We are now looking for a Senior ASIC Verification Engineer for our Coherent High Speed Interconnect team! For two decades, we have pioneered visual computing, the art and science of computer graphics. With our invention of the GPU - the engine of modern visual computing - the field has grown to encompass video games, movie production, product design, medical diagnosis, and scientific research. Today, we stand at the beginning of the next era, the AI computing era, ignited by a new computing mod

Senior ASIC Verification Engineer - HSIOJob Title - Senior ASIC Verification Engineer - HSIO

NVIDIA CorporationCompany Name - NVIDIA Corporation

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Westford, Massachusetts, USA

Full-time

NVIDIA is seeking a Senior Design Verification Engineer to verify the design and implementation of the next generation of High Speed I/O controllers for the world's leading SOCs and GPUs. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. We have crafted a team of extraordinary people stretching around the globe, whose missio

Verification EngineerJob Title - Verification Engineer

AdientOne LLCCompany Name - AdientOne LLC

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Massachusetts, USA

Contract

Role: Verification Engineer Location: Boxborough MA 01719 | Hybrid Duration: 12+ months Note: Prefer experience with PSS language and UVM Job Description: Participate in the functional verification of a block(s) of complex ASICs and/or IP cores for a combined CPU/GPU development effort. Be part of a team of design and verification engineers, working closely with other team members to understand and verify the functionality of a given design element within the context of the block, chip and ove

Senior FPGA Design Verification Engineer - Secret ClearanceJob Title - Senior FPGA Design Verification Engineer - Secret Clearance

Amarx Search, Inc.Company Name - Amarx Search, Inc.

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Dedham, Massachusetts, USA

Full-time

Amarx Search, Inc. - amarx.com Direct Hire - Full Time position in Dedham, MA Position ID: 2632 An excellent position with a major global technology solutions company * Senior FPGA Design Verification Engineer - Secret Clearance * Please apply ONLY if you have an active DOD Secret clearance and VHDL (or similar) United States Citizenship is required due to government contract requirement; we are unable to sponsor at this time. We can ONLY consider your application if you have: 1: Active DOD Sec

Design Verification EngineerJob Title - Design Verification Engineer

Avance ConsultingCompany Name - Avance Consulting

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Remote

Full-time

<>Key Responsibilities:Strong understanding of SV and UVM and good debugging skills.Understanding of AMBA protocols.Understand design specs and develop test plans based on functional and architectural requirementsBuild UVM/System Verilog-based verification environments for IP/subsystem/SoC level testingDevelop directed and random testcases, perform coverage analysis, and close functional/code coverageDebug simulation failures and work closely with RTL designers to resolve issuesExecute regressio

Design Verification EngineerJob Title - Design Verification Engineer

TecHobbitCompany Name - TecHobbit

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Remote

Contract

Title: Design Verification Engineer Location: Remote Duration: 12 months with possible extension Requirement: Good Design Verification Skill with major GLS work experience. Expertise in testbench updates for GLS Expertise in Scripting languages perl or python Experience with Make, Yaml & Json file systems. Experience with 0 delay simulations and post layout simulations with SDF back annotations (Best/Typical/Worst Case analysis). Good understanding of RTL synthesis , Static Timing Analysis &

FPGA Design Verification EngineerJob Title - FPGA Design Verification Engineer

DBA Web TechnologiesCompany Name - DBA Web Technologies

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Dedham, Massachusetts, USA

Full-time

FPGA Design Verification Engineer (OVM - UVM design verification, FPGA - ASIC design, bash, csh, Perl, TCL, Python, VHDL, Xilinx FPGA & Questa) in Dedham, MA7+ to 10 years of experience POSITION: FPGA Design Verification Engineer (OVM - UVM design verification, FPGA - ASIC design, bash, csh, Perl, TCL, Python, VHDL, Xilinx FPGA & Questa) in Dedham, MA SECURITY CLEARANCE: Must be able to obtain Secret Security Clearance (ship is Required) LOCATION: Dedham, MA (onsite) DURATION: Full-Time Positio

Design Verification EngineerJob Title - Design Verification Engineer

Innova Solutions, IncCompany Name - Innova Solutions, Inc

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Remote or Mountain View, California, USA

Third Party, Contract

A client of Innova Solutions is looking for an Design Verification Engineer. Position type: Contract Duration: 12+ Months Location: Mountain View, CA (Onsite Job) As a Design Verification Engineer, you will need: Minimum Qualifications: Experience in SV and UVM and good debugging skills.Understanding of AMBA protocols.Build UVM/System Verilog-based verification environments for IP/subsystem/SoC level testingDevelop directed and random testcases, perform coverage analysis, and close functional/co

Identity Verification EngineerJob Title - Identity Verification Engineer

MF CYBER LLCCompany Name - MF CYBER LLC

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Remote

Full-time

Job Overview: We are seeking a Software Engineer with a strong foundation in Identity and Access Management across various domains such as Identity Governance, and Access Management. The ideal candidate will have hands-on experience with coding and scripting to work with APIs in IAM products and performing hands-on integration of Identity Verification tools. Key Responsibilities: * Design and implement IAM solutions across multiple IAM pillars, including Identity Governance, Access Management.

Lead AMS Verification EngineerJob Title - Lead AMS Verification Engineer

Inherent TechnologiesCompany Name - Inherent Technologies

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Full-time, Part-time, Contract, Third Party

Position: Lead AMS Verification Engineer Location: Remote Duration: 1 Years Job Description: We are seeking highly skilled Lead AMS Verification Engineers to join our team. The ideal candidate will have extensive experience in AMS verification at both the SoC (chip) and block level, using netlist and/or models. This role requires a deep understanding of analog circuits, including low power circuits, PMIC, high-speed clocking circuits, and data converters. The candidate should also possess st

Design Verification Engineer- Remote- USAJob Title - Design Verification Engineer- Remote- USA

Yochana IT SolutionsCompany Name - Yochana IT Solutions

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Contract, Third Party

Good DV Skill with major GLS work experience. Expertise in testbench updates for GLS Expertise in Scripting languages perl or python Experience with Make, Yaml & Json file systems. Experience with 0 delay simulations and post layout simulations with SDF back annotations (Best/Typical/Worst Case analysis). Good understanding of RTL synthesis , Static Timing Analysis & LEC Flows. Experience with flow optimizations such as Grey/Black-boxing techniques Good at communicating requirements/issues wit

SOC Verification Engineer- Remote- USAJob Title - SOC Verification Engineer- Remote- USA

Yochana IT SolutionsCompany Name - Yochana IT Solutions

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Contract, Third Party

8+ years experience Strong in SV / UVM and full chip verification Networking protocol knowledge PCIe, Ethernet, CXL etc. Testbench creation & Scoreboarding

Design Verification EngineerJob Title - Design Verification Engineer

Yoh - A Day & Zimmerman CompanyCompany Name - Yoh - A Day & Zimmerman Company

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Remote or Santa Clara, California, USA

Full-time

Design Verification Engineer Scope: Design and development of the IO subsystems for a high-performance SoC from scratch, working closely with the Architecture and RTL teams. Develop detailed block-level design specifications and plans for a high-performance IO Subsystem. Create and implement reusable block-level components in SV, UVM, and C++, including microarchitectural models, monitors, and checkers. Develop and optimize the IO subsystem design to ensure functionality and performance are in a

ASIC Verification EngineerJob Title - ASIC Verification Engineer

Yoh - A Day & Zimmerman CompanyCompany Name - Yoh - A Day & Zimmerman Company

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Remote or Monte Sereno, California, USA

Full-time

ASIC Verification Engineer Reviewing the product designs and noting likely points of failure. Designing verification methodology based on product designs and failure points. Determining testing environments and verification tools. Planning the method of sequence for testing operations. Instituting and tweaking testing mechanisms and protocols. Writing up final test procedures and training QC staff. Qualificatios Bachelor s or Master s in Electrical or Computer Science 4 years of Design Verificat

Network On Chip Verification EngineerJob Title - Network On Chip Verification Engineer

AMD (Advanced Micro Devices)Company Name - AMD (Advanced Micro Devices)

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Boxborough, Massachusetts, USA

Full-time

WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world's most important challenges. We strive for execution excellen

Senior Digital Verification EngineerJob Title - Senior Digital Verification Engineer

PsiQuantumCompany Name - PsiQuantum

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Remote or Palo Alto, California, USA

Full-time

Quantum computing holds the promise of humanity's mastery over the natural world, but only if we can build a real quantum computer. PsiQuantum is on a mission to build the first real, useful quantum computers, capable of delivering the world-changing applications that the technology has long promised. We know that means we will need to build a system with roughly 1 million qubits that supports fault tolerant error correction within a scalable architecture, and a data center footprint. By harnes

FPGA Design Verification EngineerJob Title - FPGA Design Verification Engineer

General DynamicsCompany Name - General Dynamics

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Dedham, Massachusetts, USA

Full-time

Basic Qualifications Requires a Bachelor's degree in Electrical or Computer Engineering, or a related Science, Engineering or Mathematics field. Also requires 5+ years of job-related experience, or a Master's degree plus 3 years of job-related experience. CLEARANCE REQUIREMENTS: Department of Defense Secret security clearance is required at time of hire. Applicants selected will be subject to a U.S. Government security investigation and must meet eligibility requirements for access to classifi

Senior FPGA Design Verification EngineerJob Title - Senior FPGA Design Verification Engineer

General DynamicsCompany Name - General Dynamics

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Dedham, Massachusetts, USA

Full-time

Basic Qualifications Bachelor's degree in Electrical or Computer Engineering, or a related Science, Engineering or Mathematics field, plus a minimum of 8 years of relevant experience; or Master's degree plus a minimum of 6 years of relevant experience. CLEARANCE REQUIREMENTS: Department of Defense Secret security clearance is required at time of hire. Applicants selected will be subject to a U.S. Government security investigation and must meet eligibility requirements for access to classified

ASIC Verification EngineerJob Title - ASIC Verification Engineer

Cisco Systems, Inc.Company Name - Cisco Systems, Inc.

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Maynard, Massachusetts, USA

Full-time

The application window is expected to close on 6/15/2025 This is an onsite role with a strong preference working out of the Maynard, MA office location, but can also be based out of our San Jose, CA or RTP, NC offices. Meet the Team: Acacia, part of Cisco, provides innovative silicon-based high-speed optical interconnect products to accelerate network scalability through advancements in performance, capacity, and cost. Our DSP ASICs, silicon photonic PICs, and coherent modules empower cloud a

ASIC/FPGA Lead Verification Engineer, 9+ YearsJob Title - ASIC/FPGA Lead Verification Engineer, 9+ Years

Lockheed Martin CorporationCompany Name - Lockheed Martin Corporation

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Remote or California, USA

Full-time

Job Description Join Our Team as an ASIC & FPGA Lead Verification Engineer where you will support over 50 different programs and research and development (R&D) efforts, affecting technology across military space, civil space, commercial space, missiles, missile defense platforms, satellite surveillance platforms, deep space exploration, and manned flight missions. Location: This position does not support teleworking; the preferred candidate will be located near our Lockheed Martin Space facilit