design verification engineer Jobs

21 - 40 of 1,173 Jobs

Design Verification Engineer at Santa Clara, CA (Hybrid)Job Title - Design Verification Engineer at Santa Clara, CA (Hybrid)

Infobahn Softworld Inc.Company Name - Infobahn Softworld Inc.

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Santa Clara, California, USA

Contract, Third Party

Role Title: Design Verification Engineer Location: Santa Clara, CA, 95054 (Hybrid 3 days a week) Duration: 12+ months contract Job Duties: Participate in the functional verification of a block(s) of complex ASICs and/or IP cores for an I/O SOC. Be part of a team of design verification team, working closely with other team members to understand and verify the functionality of a given design element within the context of the block, chip and overall system. Candidate will be participating in the

System IP Design Verification EngineerJob Title - System IP Design Verification Engineer

West Coast Consulting LLCCompany Name - West Coast Consulting LLC

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California, USA

Contract

Job Description ONSITE - San Jose, CA or Austin, TX Summary We are currently looking for exceptional hardware verification engineers to join our System IP team in our Austin, TX R & D Center (SARC) and our Advanced Computing Lab (ACL) in San Jose, CA. System IP team develops proprietary coherent interconnect and memory controller IPs deployed in many high-volume products. Job Description As a Senior Staff System IP Design Verification Contractor you will contribute to the functional verificat

Design Verification Engineer- Remote- USAJob Title - Design Verification Engineer- Remote- USA

Yochana IT SolutionsCompany Name - Yochana IT Solutions

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Contract, Third Party

Good DV Skill with major GLS work experience. Expertise in testbench updates for GLS Expertise in Scripting languages perl or python Experience with Make, Yaml & Json file systems. Experience with 0 delay simulations and post layout simulations with SDF back annotations (Best/Typical/Worst Case analysis). Good understanding of RTL synthesis , Static Timing Analysis & LEC Flows. Experience with flow optimizations such as Grey/Black-boxing techniques Good at communicating requirements/issues wit

Design Verification EngineerJob Title - Design Verification Engineer

JConnect IncCompany Name - JConnect Inc

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San Jose, California, USA

Full-time

Role: Design Verification Engineers (SoC-5, PCIe-5)Location: Bay AreaSalary: 160-240k (DOE) Free health insurancePTOs: 10 Business days (Including sick leaves) Key Skills: UVM, SoC, PCIe, High Bandwidth memory, Emulation (Zebu or Palladium) Job Description: Architect block and full-chip verification environments using HVLs and constrained random techniques for SOCs with embedded CPUs and mixed signal interfaces. Requires UVM, System Verilog, SVA Develop test plans and coverage metrics from speci

Design Verification EngineerJob Title - Design Verification Engineer

Yoh - A Day & Zimmerman CompanyCompany Name - Yoh - A Day & Zimmerman Company

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Remote or Santa Clara, California, USA

Full-time

Design Verification Engineer Scope: Design and development of the IO subsystems for a high-performance SoC from scratch, working closely with the Architecture and RTL teams. Develop detailed block-level design specifications and plans for a high-performance IO Subsystem. Create and implement reusable block-level components in SV, UVM, and C++, including microarchitectural models, monitors, and checkers. Develop and optimize the IO subsystem design to ensure functionality and performance are in a

FPGA Design Verification EngineerJob Title - FPGA Design Verification Engineer

General DynamicsCompany Name - General Dynamics

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Dedham, Massachusetts, USA

Full-time

Basic Qualifications Requires a Bachelor's degree in Electrical or Computer Engineering, or a related Science, Engineering or Mathematics field. Also requires 5+ years of job-related experience, or a Master's degree plus 3 years of job-related experience. CLEARANCE REQUIREMENTS: Department of Defense Secret security clearance is required at time of hire. Applicants selected will be subject to a U.S. Government security investigation and must meet eligibility requirements for access to classifi

Senior FPGA Design Verification EngineerJob Title - Senior FPGA Design Verification Engineer

General DynamicsCompany Name - General Dynamics

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Dedham, Massachusetts, USA

Full-time

Basic Qualifications Bachelor's degree in Electrical or Computer Engineering, or a related Science, Engineering or Mathematics field, plus a minimum of 8 years of relevant experience; or Master's degree plus a minimum of 6 years of relevant experience. CLEARANCE REQUIREMENTS: Department of Defense Secret security clearance is required at time of hire. Applicants selected will be subject to a U.S. Government security investigation and must meet eligibility requirements for access to classified

ASIC and/or FPGA Design & Verification Engineer (Lead, Senior or Principal)Job Title - ASIC and/or FPGA Design & Verification Engineer (Lead, Senior or Principal)

Boeing CompanyCompany Name - Boeing Company

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Tukwila, Washington, USA

Full-time

ASIC and/or FPGA Design & Verification Engineer (Lead, Senior or Principal) Company: The Boeing Company Boeing Space, Intelligence & Weapons Systems has an exciting opportunity for multiple ASIC and/or FPGA Design and Verification Engineers (Lead, Senior or Principal) to join us as part of our Boeing Electronic Products team at the heart of Boeing's products; ASICs and FPGAs in Tukwila or Kent, WA. From complex digitally beamformed phased arrays for constellation satellite programs to computi

ASIC and/or FPGA Design & Verification Engineer (Lead, Senior or Principal)Job Title - ASIC and/or FPGA Design & Verification Engineer (Lead, Senior or Principal)

Boeing CompanyCompany Name - Boeing Company

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Huntington Beach, California, USA

Full-time

ASIC and/or FPGA Design & Verification Engineer (Lead, Senior or Principal) Company: The Boeing Company Boeing Space, Intelligence & Weapons Systems has an exciting opportunity for multiple ASIC and/or FPGA Design and Verification Engineers (Lead, Senior or Principal) to join us as part of our Boeing Electronic Products team at the heart of Boeing's products; ASICs and FPGAs in Huntington Beach or El Segundo, CA. From complex digitally beamformed phased arrays for constellation satellite prog

ASIC and/or FPGA Design & Verification Engineer (Lead, Senior or Principal)Job Title - ASIC and/or FPGA Design & Verification Engineer (Lead, Senior or Principal)

Boeing CompanyCompany Name - Boeing Company

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Fairfax, Virginia, USA

Full-time

ASIC and/or FPGA Design & Verification Engineer (Lead, Senior or Principal) Company: The Boeing Company Boeing Space, Intelligence & Weapons Systems has an exciting opportunity for multiple ASIC and/or FPGA Design and Verification Engineers (Lead, Senior or Principal) to join us as part of our Boeing Electronic Products team at the heart of Boeing's products; ASICs and FPGAs in Fairfax, VA. From complex digitally beamformed phased arrays for constellation satellite programs to computing and n

ASIC and/or FPGA Design and Verification Engineer (Entry Level, Associate or Mid-Level)Job Title - ASIC and/or FPGA Design and Verification Engineer (Entry Level, Associate or Mid-Level)

Boeing CompanyCompany Name - Boeing Company

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Fairfax, Virginia, USA

Full-time

ASIC and/or FPGA Design and Verification Engineer (Entry Level, Associate or Mid-Level) Company: The Boeing Company Boeing Space, Intelligence & Weapons Systems has an exciting opportunity for multiple ASIC and/or FPGA Design and Verification Engineers (Entry Level, Associate or Mid-Level) to join us as part of our Boeing Electronic Products team at the heart of Boeing's products; ASICs and FPGAs in Fairfax, VA. From complex digitally beamformed phased arrays for constellation satellite progr

ASIC/FPGA Design and Verification Engineer (Experienced, Lead or Senior)Job Title - ASIC/FPGA Design and Verification Engineer (Experienced, Lead or Senior)

Boeing CompanyCompany Name - Boeing Company

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Tukwila, Washington, USA

Full-time

ASIC/FPGA Design and Verification Engineer (Experienced, Lead or Senior) Company: The Boeing Company Boeing Space, Intelligence & Weapons Systems has an exciting opportunity for an ASIC and/or FPGA Design and Verification Engineer (Experienced, Lead or Senior) to join us as part of our Boeing Electronic Products team at the heart of Boeing's products; ASICs and FPGAs in Kent or Tukwila, WA. Our site enjoys every other Friday off a part of our 9/80 flexible schedule! We also get to enjoy 4+ we

Electrical Design Verification Test (EDVT) EngineerJob Title - Electrical Design Verification Test (EDVT) Engineer

Oxford Global ResourcesCompany Name - Oxford Global Resources

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Sunnyvale, California, USA

Contract

Position Title: Electrical Design Verification Test (EDVT) Engineer Location: Sunnyvale, CA- 100% onsite Length of Contract: 6 months+ extensions (potential for conversion - Contract-to-perm) Background check Required Scope: 2-3 weeks to onboard, with a probable start date of early April timeframe. Looking for person can do Network Testing and DVT especially strong in EDVT with ability to understand reading EE schematics, and strong broad knowledge of hardware in addition to networking product

Senior Engineer, Design Verification Engineering (multiple openings)Job Title - Senior Engineer, Design Verification Engineering (multiple openings)

Analog Devices, Inc.Company Name - Analog Devices, Inc.

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Franklin Township, New Jersey, USA

Full-time

About Analog Devices Analog Devices, Inc. (NASDAQ: ADI ) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, and software technologies into solutions that help drive advancements in digitized factories, mobility, and digital healthcare, combat climate change, and reliably connect humans and the world. With revenue of more than $9 billion in FY24 and approximately 24,000 people globally, ADI

Design Verification Engineer|| RemoteJob Title - Design Verification Engineer|| Remote

Zodiac Solutions Inc.Company Name - Zodiac Solutions Inc.

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Contract, Third Party

Position : Design Verification Engineer Location: Remote Job Description : Good DV Skill with major GLS work experience. Expertise in testbench updates for GLS Expertise in Scripting languages perl or python Experience with Make, Yaml & Json file systems. Experience with 0 delay simulations and post layout simulations with SDF back annotations (Best/Typical/Worst Case analysis). Good understanding of RTL synthesis , Static Timing Analysis & LEC Flows. Experience with flow optimizations such as

ASIC Engineer, Senior Staff, Physical Design VerificationJob Title - ASIC Engineer, Senior Staff, Physical Design Verification

Juniper NetworksCompany Name - Juniper Networks

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Sunnyvale, California, USA

Full-time

At Juniper, we believe the network is the single greatest vehicle for knowledge, understanding, and human advancement the world has ever known. To achieve real outcomes, we know that experience is the most important requirement for networking teams and the people they serve. Delivering an experience-first, AI-Native Network pivots on the creativity and commitment of our people. It requires a consistent and committed practice, something we call the Juniper Way. Job Description for an ASIC Physi

Principal Engineer, Design Verification EngineeringJob Title - Principal Engineer, Design Verification Engineering

Analog Devices, Inc.Company Name - Analog Devices, Inc.

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Wilmington, Massachusetts, USA

Full-time

Distinguish Engineer Design VerificationJob Title - Distinguish Engineer Design Verification

Marvell Semiconductor Inc.Company Name - Marvell Semiconductor Inc.

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Santa Clara, California, USA

Full-time

About Marvell Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and be

ASIC Engineer (Design Verification)Job Title - ASIC Engineer (Design Verification)

CloudiousCompany Name - Cloudious

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Sunnyvale, California, USA

Contract, Third Party

ASIC Engineer (Design Verification) Bay Area, CA or Austin, TX 12 Months Responsibilities Define and implement IP/SoC verification plans, build verification test benches to enable IP/sub-system/SoC level verification. Develop functional tests based on verification test plan. Drive Design Verification to closure based on defined verification metrics on test plan, functional and code coverage. Debug, root-cause and resolve functional failures in the design, partnering with the Design team. Collab

Staff Engineer, Design Verification EngineeringJob Title - Staff Engineer, Design Verification Engineering

Analog Devices, Inc.Company Name - Analog Devices, Inc.

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Wilmington, Massachusetts, USA

Full-time