design verification engineer jobs

LASARA, Tx

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Today

Stefanini Group is hiring!Stefanini is looking for FPGA Design Verification Engineer -Ottawa, Ontario, CanadaFor quick apply, please contact Ph: 248 263 Only! 22 Days PTO (See Below the bifurcation) * 10 Days PTO( 80 Hours of PTO - Accrual Basis)* 9 Holidays on average throughout the year* 3 Personal Days About the Role: Client's 5G R&D team is developing next-generation Open RAN Radio Units for 4G and 5G networks. As an FPGA Design Verification Engineer, you will play a key role in ensuri

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Contract

$73 - $78 /hr

Hardware Design/Verification Engineer (FPGA, UVM)

Marlborough, Massachusetts

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Today

RESPONSIBILITIES: Kforce's client, a growing technology company delivering innovative communications products and services worldwide, is seeking an experienced Hardware Design/Verification Engineer (FPGA, UVM) in Marlborough, MA. In this role, the Hardware Design/Verification Engineer will work alongside a collaborative team of engineers developing the next generation of advanced communications systems. Key Responsibilities: * Develop and maintain verification environment in SystemVerilog/UVM *

Full-time

$160,000 - $200,000 annually

Design Verification Engineer- PCIe

San Jose, California

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Yesterday

Description: The Design Verification (DV)engineer at Clients is involved in the functional verification of PCIe controller and PCIe-phy at block, sub-system and MLSoC level. Will also be involved in PCIe bring-up and debug on emulator. Generate required PCIe controller and phy initialization (register programming code sequence) for PCIe Required Background: BS/MS in EE (Electrical Engineering) or CS (Computer Science) with 12+ years of experience in functional verification and silicon bring-up/

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Full-time

Depends on Experience

Design Verification Engineer- DDR/LPDDR5

San Jose, California

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Yesterday

Required Background: BS in Computer Science/EE with 10+ years of experience or MS in computer science/EE with 8+ years of experience in SoC design verification.Experience with block level, cluster level or chip/SoC level verification.Proficiency in system verilog, UVM, constrained random and coverage driven verification methodology.DDR controller and/or DDR-IO verification experience is a must.Very good understanding of LPDDR JDEC specifications preferably for LPDDR5.Good understanding of DDR co

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Full-time

Depends on Experience

Design Verification Engineer

Remote

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7d ago

RequirementsKnowledge of semiconductor ASIC design/verification methodologies and flows Working knowledge of Verilog/SystemVerilog/UVM Strong programming skills including object-oriented programming Working experience with digital logic design and verification Practical experience in D2D, NOC, AXI, Ethernet, DDR/LPDDR, HBM, Security, Networking, ARM CPU subsystems Demonstrates good analysis, problem-solving, and critical thinking skills Effective interpersonal, teamwork, and communication skills

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Contract

Depends on Experience

FPGA Design Verification Engineer

Mountain View, California

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Yesterday

FPGA Design Verification EngineerIntroduction:The FPGA Design Verification Engineer will play a crucial role in the team, leading FPGA design verification activities for advanced wireless communication systems. They will be responsible for developing, implementing, and validating DSP algorithms and functional blocks, contributing to phased array and beamforming projects, and ensuring high performance and reliability in FPGA-based systems. Responsibilities:Extensive experience in FPGA design and

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Contract, Third Party

70 - 90

Digital Design Verification Engineer

Remote

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2d ago

Minimum 10+ years of experience in Digital Design Verification (DV) Proficiency in SystemVerilog for verification environments Hands-on experience in digital verification methodologies and testbench development Familiarity with mixed-signal designs, preferably involving ADC-based chips Experience working in Unix/Linux environments Hands-on experience with Cadence Xcelium simulation tool Comfortable working with both Linux/Unix and Windows-based environments

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Contract

Depends on Experience

SoC Design Verification Engineer

San Jose, California

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2d ago

Job: SoC Design Verification Engineer (DV Engineer) Location: MUST work onsite in San Jose Visa: GC. EAD LinkedIn : Must We are looking forstrong SoC DVcandidates. System-level experience is highly preferred. AXI4 experience is preferred Strong SystemVerilog and UVM skillsScripting experience (Python/Perl/Shell) is a plusC-based programming experience is a strongplusExperience with infrastructure tasks (testbench development, VIP integration, etc.)Solid debugging and problem-solving skillsGo

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Contract, Third Party

50 - 60

Senior Design Verification Engineer – SystemVerilog / UVM / AXI – San Diego

San Diego, California

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23d ago

Job Title: Senior Design Verification Engineer (SystemVerilog / UVM) Location: San Diego, CA Experience Required: 8+ Years Employment Type: Full-Time / Contract Job Description: We are seeking an experienced Design Verification Engineer with strong expertise in SystemVerilog and UVM methodology. The candidate will be responsible for verifying complex ASIC/RTL designs and developing robust verification environments across the full verification lifecycle. Key Responsibilities: Perform digital des

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Third Party, Contract

Depends on Experience

Design Verification Engineer (GPU)

San Jose, California

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14d ago

Job Title: "Design Verification Engineer (GPU)" Location: San Jose, CA (Onsite, 5 days a week) Duration: Long Term Description As a GPU Design Verification Engineer, your talents will ensure the quality at the heart of our GPU architecture. Creativity is a necessity to overcome the challenges inherent to verifying the proper operation of our low-power GPU. Versatility and broad knowledge of state-of-the-art verification techniques including the most up-to-date I UVM version will place you among

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Contract

Depends on Experience

FPGA Design / Verification Engineer

Englewood, Colorado

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8d ago

Job Title: FPGA Design/Verification Engineer Duration: up to 6 months contract with possible extension Location: Littleton, CO Work Schedule: 5/10 1st Shift, Monday to Friday; 8 hours per day. Pay Rate: $100/hr on W2 [the pay rate may differ depending on your skills, education, experience, and other qualifications] Featured Benefits: Medical Insurance in compliance with the ACA 401(k) Sick leave in compliance with applicable state, federal, and local laws Job Description: The selected can

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Contract

100

Control Fabric Design Verification Engineer

Folsom, California

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Today

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the wo

Full-time

USD 121,940.00 per year

Senior FPGA/ASIC Design /Verification Engineer (Onsite)

Cedar Rapids, Iowa

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Today

Date Posted: 2026-01-27 Country: United States of America Location: US-IA-CEDAR RAPIDS-193 ~ 1120 Collins Rd NE ~ BLDG193 Position Role Type: Onsite U.S. Citizen, U.S. Person, or Immigration Status Requirements: Security Clearance Type: None/Not Required Security Clearance Status: Not Required Are you interested in becoming part of a growing Avionics FPGA/ASIC team? This position is for a highly experienced, highly motivated Electrical or Computer Engineer that will be involved in the design

Full-time

USD 86,800.00 per year

Power Management Systems Design and Verification Engineer

San Diego, California

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Today

Company: Qualcomm Technologies, Inc. Job Area: Engineering Group, Engineering Group > PMIC Systems General Summary: Qualcomm is a company of inventors that deliver leading-edge AI, high performance, lower-power computing, and unrivaled connectivity. It takes inventive minds with diverse skills, backgrounds, and cultures to transform potential into world-changing technologies and products. This is the Invention Age - and this is where you come in. Qualcomm's Power Management Systems team lead

Full-time

USD 93,200.00 - 139,800.00 per year

ASIC/FPGA Design and Verification Engineer - (Lead, Senior, or Principal)

Albuquerque, New Mexico

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Today

ASIC/FPGA Design and Verification Engineer - (Lead, Senior, or Principal) Company: The Boeing Company Boeing Space, Intelligence & Weapons Systems has an exciting opportunity for multiple ASIC/FPGA Design or Verification Engineers (Lead, Senior, or Principal) to join us as part of our Boeing Electronic Products team at the heart of Boeing's products; ASICs and FPGAs in Albuquerque, NM. From complex digitally beamformed phased arrays for constellation satellite programs to computing and network

Full-time

USD 136,850.00 - 185,150.00 per year

Engineer, Design Verification Engineering

Chandler, Arizona

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Today

About Analog Devices Analog Devices, Inc. (NASDAQ: ADI ) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, and software technologies into solutions that help drive advancements in digitized factories, mobility, and digital healthcare, combat climate change, and reliably connect humans and the world. With revenue of more than $9 billion in FY24 and approximately 24,000 people globally, ADI

Full-time

Principal Engineer, Design Verification

Durham, North Carolina

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Today

Full-time

Principal Engineer, Design Verification (NPU)

Mountain View, California

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20d ago

Role: Principal Engineer, Design Verification (NPU) Location: Mountain View, CA (Onsite) Job Type: Contract Project description The Principal Design Verification Engineer, within the NPU Hardware & Software organization, is intended for an individual with a broad background in design verification and complex digital system validation, with significant experience in AI accelerator verification and automotive safety standards. This role is responsible for driving the verification excelle

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Third Party, Contract

$90 - $120

Staff Engineer, Design Verification

San Jose, California

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Today

Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Staff Design Engineer at Micron Technology, Inc., you will be responsible for designing and analyzing digital and analog circuits used in the development of memory products! We are engaged in

Full-time

USD 116,000.00 - 246,000.00 per year

Mechanical Engineer Design Verification Checker

Littleton, Colorado

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Today

Job Description Space is a critical domain, connecting our technologies, our security and our humanity. While others view space as a destination, we see it as a realm of possibilities, where we can do more - we can innovate, invest, inspire and integrate our capabilities to transform the future. At Lockheed Martin Space, we aim to harness the full potential of space to cultivate innovation, reduce costs, and push the boundaries of what technology can achieve. We're creating future-ready soluti

Full-time

USD 85,500.00 - 150,765.00 per year

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design verification engineer jobs