design verification engineer Jobs

1 - 20 of 1,198 Jobs

Senior Design Verification EngineerJob Title - Senior Design Verification Engineer

SivaltechCompany Name - Sivaltech

•

San Diego, California, USA

Contract

Job descriptionCompany Description Sivaltech is a well-established ASIC/FPGA, Analog, and Embedded Software design services company with offices in California, USA, and Bangalore, India. We are a preferred design services partner for both Fortune 500 companies and startups in the semiconductor industry. With expertise spanning GPUs, CPUs, wireless, communications, medical, broadband, and consumer electronics, Sivaltech is well-equipped to address our clients' complex design challenges. Role Desc

Design Verification EngineerJob Title - Design Verification Engineer

Innova Solutions, IncCompany Name - Innova Solutions, Inc

•

Mountain View, California, USA

Contract

A client of Innova Solutions is immediately hiring for a Design Verification Engineer Position type: Contract Location: Mountain View, CA-Onsite As a Design Verification Engineer, you will be responsible for: Job description: Strong understanding of SV and UVM and good debugging skills.Understanding of AMBA protocols.Understand design specs and develop test plans based on functional and architectural requirements.Build UVM/System Verilog-based verification environments for IP/subsystem/SoC leve

Senior Design Verification Engineer, HW Compute GroupJob Title - Senior Design Verification Engineer, HW Compute Group

Amazon.com Services LLCCompany Name - Amazon.com Services LLC

•

Sunnyvale, California, USA

Full-time

As a Design Verification (DV) Engineer, you will be part of an advanced architecture team that is exploring new hardware designs to improve our devices. In this role, you will be responsible for defining the verification methodology and implementing the corresponding test plan for advanced functional blocks. You will participate in the design verification and bring-up of such blocks by writing relevant assertions, debugging code, test benches, test harnesses, and otherwise interacting with the e

Design Verification Engineer RISC-V CPU DevelopmentJob Title - Design Verification Engineer RISC-V CPU Development

Xpeerant IncorporatedCompany Name - Xpeerant Incorporated

•

Portland, Oregon, USA

Full-time

Design Verification Engineer RISC-V CPU Development Are you passionate about cutting-edge CPU architecture and ready to take your verification skills to the next level? We re partnering with a global leader in RISC-V processor design to find talented Design Verification Engineers to join their high-impact VLSI team. You ll work alongside seasoned architects and engineers to verify next-generation RISC-V CPU cores, develop test benches from the ground up, and help shape the future of custom CPU I

Design Verification EngineerJob Title - Design Verification Engineer

Mirafra IncCompany Name - Mirafra Inc

•

San Jose, California, USA

Full-time

Experience: 6 to 15+ years of experience. Job Requirements are as below: Architect block and full-chip verification environments using HVLs and constrained random techniques for SOCs with embedded CPUs and mixed signal interfaces. Requires UVM, System Verilog, SVA Develop test plans and coverage metrics from specifications and write block and chip-level tests in C,SV,UVM Debug RTL and Gate simulations and work with design engineers to verify fixes. Write diagnostics for validation of FPGA prot

Design Verification Engineer - SOCJob Title - Design Verification Engineer - SOC

Millennium Software, Inc.Company Name - Millennium Software, Inc.

•

San Jose, California, USA

Contract

Millennium Software & Staffing is looking for Design Verification Engineer SOC at San Jose, CA Below are the details: Title : Design Verification Engineer SOC Location : San Jose, CA TOP SKILLS: SOCUVM, System VerilogIntegrate GPU, CPU, Arm Based SystemPCIe, DDR, Ethernet, Bus ProtocolsPython Scripting Candidate should have average or above average Python SkillsExperience: 8+ years of experience in SOC, SystemVerilog/UVM methodologyExperience in EDA tools and scripting (Python, TCL, Perl, Shell

Principal Design Verification EngineerJob Title - Principal Design Verification Engineer

OSI Engineering, Inc.Company Name - OSI Engineering, Inc.

•

San Jose, California, USA

Full-time

Principal Design Verification Engineer A leading chip and silicon IP provider focused on accelerating and securing data is looking to hire an outstanding Principal Design Verification Engineer to join its Memory Interface Chip (MIC) team in San Jose, CA. This role offers the chance to work alongside top engineering talent on innovative products that push the boundaries of speed and data security. As a Principal Design Verification Engineer, you ll play a critical role in the development of MIC

AI HW Design Verification EngineerJob Title - AI HW Design Verification Engineer

Yoh - A Day & Zimmerman CompanyCompany Name - Yoh - A Day & Zimmerman Company

•

Remote or Santa Clara, California, USA

Full-time

AI HW Design Verification Engineer Looking for a Senior Design Verification Engineer. This person will play a key role in quality and reliability of digital designs through comprehensive verification methodologies. This person should have a strong background in verification techniques/processes, problem solving skills, and skilled at delivering high quality designs. Scope: Develop & execute comprehensive verification strategies in order to validate complex digital designs, ensuring compliance w

Defense Sr. FPGA Design Verification Engineer with Secret ClearanceJob Title - Defense Sr. FPGA Design Verification Engineer with Secret Clearance

ZoeTech Staffing LLCCompany Name - ZoeTech Staffing LLC

•

Columbia, Maryland, USA

Full-time

Job Description: Our defense client is seeking digital verification engineers to support our development of secure tactical communication products. The candidate will function primarily in an FPGA verification role, working in a cooperative team environment to verify and test embedded FPGA firmware for radio communication systems. Successful candidates must have familiarity with a coverage-driven verification methodology from planning through closure as well as knowledge of industry standard int

MLA IP Design Verification Engineer , Annapurna LabsJob Title - MLA IP Design Verification Engineer , Annapurna Labs

Annapurna Labs (U.S.) Inc.Company Name - Annapurna Labs (U.S.) Inc.

•

Cupertino, California, USA

Full-time

Job summary Amazon Web Services provides a highly reliable, scalable, low-cost infrastructure platform in the cloud that powers hundreds of thousands of businesses in 190 countries around the world. We are seeking an experienced Design Verification Engineers to build the next generation of our cloud server platforms. Our success depends on our world-class infrastructure; we're handling massive scale and rapid integration of emergent technologies. As a member of the Cloud-Scale Machine Learning

Design Verification EngineerJob Title - Design Verification Engineer

LeadStack, Inc.Company Name - LeadStack, Inc.

•

No location provided

Full-time, Contract

Lead Stack Inc. is an award-winning, one of the nation's fastest-growing, certified minority-owned (MBE) staffing services provider of contingent workforce. As a recognized industry leader in contingent workforce solutions and Certified as a Great Place to Work, we're proud to partner with some of the most admired Fortune 500 brands in the world. TITLE: Design Verification Engineer LOCATION: San Jose CA/ Austin TX DURATION: 5+ Months with possible extension Rate: $90-$110/hr on W2 Job Descriptio

FPGA Design & Verification Engineer - Air VehiclesJob Title - FPGA Design & Verification Engineer - Air Vehicles

Aduril IndustriesCompany Name - Aduril Industries

•

Costa Mesa, California, USA

Full-time

Anduril Industries is a defense technology company with a mission to transform U.S. and allied military capabilities with advanced technology. By bringing the expertise, technology, and business model of the 21st century's most innovative companies to the defense industry, Anduril is changing how military systems are designed, built and sold. Anduril's family of systems is powered by Lattice OS, an AI-powered operating system that turns thousands of data streams into a realtime, 3D command and c

Design Verification EngineerJob Title - Design Verification Engineer

AdientOne LLCCompany Name - AdientOne LLC

•

Massachusetts, USA

Contract

Role: Design Verification Engineer Location: Boxborough MA 01719 | Hybrid Duration: 7 months Job Description: Collaborate with team to verify complex IP blocks. Develop and execute tests. Debug issues related to functionality, performance, and power. Work on functional and/or code coverage closure. Requirements: Proven experience working in UVM and constrained-random simulation environments. Strong knowledge of System Verilog, Verilog, C/C++, and scripting languages. Familiarity with 3D pipelin

Design Verification Engineer (GPU)Job Title - Design Verification Engineer (GPU)

West Coast Consulting LLCCompany Name - West Coast Consulting LLC

•

Texas, USA

Contract

Job Description Austin, TX or San Jose, CA Onsite Description: Position Requirements: Role and Responsibilities: Key responsibilities include Work with architects and designers to build verification environments and test plans Craft functional verification coverage strategy to ensure complete test suite implementation Develop assertions and checks to optimize isolation time and produce meaningful failing signatures Analyze failing tests to root cause along, working with RTL and reference modeli

Digital SoC Design Verification Principal Engineer/ManagerJob Title - Digital SoC Design Verification Principal Engineer/Manager

Island StaffingCompany Name - Island Staffing

•

San Jose, California, USA

Full-time

Digital SoC Design Verification Principal Engineer/Manager 140-225K (+ Pre-IPO Stock Options) San Jose, CA (hybrid 1 day/week remote, 4 days/week onsite) We are looking for an experienced Digital SoC Design Verification Principal Engineer/Manager to lead a team of engineers in developing innovative Open RAN SoC functional blocks for 5G cellular base stations. In this role, you will be responsible for driving the development of high-quality digital solutions and contributing to product definition

Mixed-Signal Design Verification EngineerJob Title - Mixed-Signal Design Verification Engineer

Talent Junction, LLC.Company Name - Talent Junction, LLC.

•

San Jose, California, USA

Contract, Third Party

Title: Mixed-Signal Design Verification Engineer Location: San Jose, CA Key Technical Skills:UVM/System Verilog, Python, Synopsys/Cadence EDA Verifications Tools, AMS Verification Required Experience/Skills: Good knowledge of System-Verilog RTL coding including state machines, adders, multipliers, combinatorial logic, etc. Good understanding of digital design for mixed signal control loops and designing Verilog / Verilog- A code to control analog circuits (e.g. bandgap, PLL, Amplifier, Filters

Design Verification Engineer- Remote- USAJob Title - Design Verification Engineer- Remote- USA

Yochana IT SolutionsCompany Name - Yochana IT Solutions

•

Third Party, Contract

Good DV Skill with major GLS work experience. Expertise in testbench updates for GLS Expertise in Scripting languages perl or python Experience with Make, Yaml & Json file systems. Experience with 0 delay simulations and post layout simulations with SDF back annotations (Best/Typical/Worst Case analysis). Good understanding of RTL synthesis , Static Timing Analysis & LEC Flows. Experience with flow optimizations such as Grey/Black-boxing techniques Good at communicating requirements/issues wit

Satellite or Space FPGA Design / Verification EngineerJob Title - Satellite or Space FPGA Design / Verification Engineer

Sun Technologies,Inc.Company Name - Sun Technologies,Inc.

•

Remote

Contract

Job Title: Satellite or Space FPGA Design / Verification Engineer Duration: up to 3 months contract with possible extension Location: Remote Work / Work from Home Work Schedule: 5/40-1st Shift Pay Rate: $87.19/hr on W2 [the pay rate may differ depending on your skills, education, experience, and other qualifications] Featured Benefits: Medical Insurance in compliance with the ACA401(k)Sick leave in compliance with applicable state, federal, and local laws Job Description: ASIC/FPGA Engineer an

Senior Electrical Design & Verification Engineer (DVE), OISLJob Title - Senior Electrical Design & Verification Engineer (DVE), OISL

Amazon Kuiper Manufacturing Enterprises LLCCompany Name - Amazon Kuiper Manufacturing Enterprises LLC

•

Redmond, Washington, USA

Full-time

Project Kuiper is an initiative to launch a constellation of Low Earth Orbit satellites that will provide low-latency, high-speed broadband connectivity to unserved and underserved communities around the world. They will be part of a multidisciplinary avionics design team and will work closely with PCBA design engineers, harness engineers, field-programmable gate array (FPGA) developers, embedded software developers, and system and integration engineers. They will work with design engineers to

System Verilog UVM Design Verification Test EngineerJob Title - System Verilog UVM Design Verification Test Engineer

U.S. Tech Solutions Inc.Company Name - U.S. Tech Solutions Inc.

•

Remote

Contract

Job Description: The project relates to the design and verification of a custom controller for analog components. The controller has interfaces such as SPI, Ethernet and AXI to drive the internal components and send data. Responsibilities: UVM/python test development for driving VIPs and other stimulus driversGeneration of test components such as monitors, scoreboards and python modelsCoverage closure and GLS bringup and testing Experience: 6+ years of experience with verification methodologies