graphic design professional Jobs in san jose, ca

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Staff Software Engineer - Switch Design

SUPERMICRO COMPUTER INC

San Jose, California, USA

Full-time

Job Req ID: 26078 About Supermicro: Supermicro is a Top Tier provider of advanced server, storage, and networking solutions for Data Center, Cloud Computing, Enterprise IT, Hadoop/ Big Data, Hyperscale, HPC and IoT/Embedded customers worldwide. We are the #5 fastest growing company among the Silicon Valley Top 50 technology firms. Our unprecedented global expansion has provided us with the opportunity to offer a large number of new positions to the technology community. We seek talented, pass

Design Verification Engineer at Santa Clara, CA (Hybrid)

Infobahn Softworld Inc.

Santa Clara, California, USA

Contract, Third Party

Role Title: Design Verification Engineer Location: Santa Clara, CA, 95054 (Hybrid 3 days a week) Duration: 12+ months contract Job Duties: Participate in the functional verification of a block(s) of complex ASICs and/or IP cores for an I/O SOC. Be part of a team of design verification team, working closely with other team members to understand and verify the functionality of a given design element within the context of the block, chip and overall system. Candidate will be participating in the

Design Verification Engineer

Mirafra Inc

San Jose, California, USA

Full-time

Experience: 6 to 15+ years of experience. Job Requirements are as below: Architect block and full-chip verification environments using HVLs and constrained random techniques for SOCs with embedded CPUs and mixed signal interfaces. Requires UVM, System Verilog, SVA Develop test plans and coverage metrics from specifications and write block and chip-level tests in C,SV,UVM Debug RTL and Gate simulations and work with design engineers to verify fixes. Write diagnostics for validation of FPGA prot

Senior Chassis Mechanical Design Engineer

Zachary Piper Solutions, LLC

Saratoga, California, USA

Full-time

Piper Companies is currently seeking a Senior Chassis Mechanical Design Engineer to work on-site in Saratoga, CA 5 days per week . The ideal Senior Chassis Mechanical Design Engineer is eager to solve complex challenges and help shape the future of AI networking technologies. Responsibilities of the Senior Chassis Mechanical Design Engineer: Design and optimize chassis components using CAD software (SolidWorks, AutoCAD, CATIA). Develop and improve IC packages, focusing on thermal management, e

Physical Design Engineer(Onsite) First preference : SAN JOSE, CA

Stellent IT LLC

San Jose, California, USA

Contract, Third Party

Physical Design Engineer(Onsite) First preference : SAN JOSE, CA Expected Start Date: 1st week of June Interview:Phone+Skype Job Description: Mandatory Skills/Experience Experience in leading and executing Full-chip Hierarchical Physical Design of Mixed-signal chips. Experience in understanding and writing synthesis design constraints for hierarchical physical partitions Experience in STA and Timing closure for very high-speed designs >1 GHz Experience with TSMC 12FFC node and other FINFET nodes

Senior ASIC Design Engineer

PeopleNTech

San Jose, California, USA

Third Party, Contract

What candidate will Be Doing: Map multi-million gate SoC designs onto prototyping platforms, creating design partitions, FPGA builds, and testbenches to simulate FPGA components.Establish prototyping systems in the lab and contribute to defining, evolving, and supporting our prototyping methodology.Option to engage in block-level RTL design or block or top-level IP integration.Collaborate with Software, Design, and Verification teams to validate the functional and performance objectives of the S

Senior ASIC Design Engineer

PeopleNTech

San Jose, California, USA

Third Party, Contract

Position: Senior ASIC Design Engineer Location: San Jose, CA (Complete onsite) Experience: 8+ years (Relevant) What candidate will Be Doing: Map multi-million gate SoC designs onto prototyping platforms, creating design partitions, FPGA builds, and testbenches to simulate FPGA components. Establish prototyping systems in the lab and contribute to defining, evolving, and supporting our prototyping methodology. Option to engage in block-level RTL design or block or top-level IP integration. Colla

Senior VLSI Physical Design Engineer

APN Software Services, Inc

Santa Clara, California, USA

Full-time

Please contact Abdul on "" OR email me at "" We are seeking a highly skilled Senior SoC/ASIC Physical Design Engineer to lead and drive the physical design activities to successful closure by collaborating closely with RTL and other cross-functional engineering teams. You will be responsible for developing, refining and implementing cutting-edge flows and methodologies that optimize design performance, power efficiency, and area (PPA). Your expertise will directly contribute to achieving world-c

Design Verification Engineer (GPU)

BayOne Solutions

San Jose, California, USA

Contract

Job Title - Design Verification Engineer (GPU) Duration 9 + Month (With the possibility of extension) Location:- San Jose (Onsite) Pay Rate :- $100/hr. - 120/hr. on w2 Description As a GPU Design Verification Engineer, your talents will ensure the quality at the heart of our GPU architecture. Creativity is a necessity to overcome the challenges inherent to verifying the proper operation of our low-power GPU. Versatility and broad knowledge of state-of-the-art verification techniques including th

Design Verification Engineer

Innova Solutions, Inc

Remote or Mountain View, California, USA

Third Party, Contract

A client of Innova Solutions is looking for an Design Verification Engineer. Position type: Contract Duration: 12+ Months Location: Mountain View, CA (Onsite Job) As a Design Verification Engineer, you will need: Minimum Qualifications: Experience in SV and UVM and good debugging skills.Understanding of AMBA protocols.Build UVM/System Verilog-based verification environments for IP/subsystem/SoC level testingDevelop directed and random testcases, perform coverage analysis, and close functional

Senior ASIC Design Engineer

Marici Solutions

San Jose, California, USA

Contract

Position: Senior ASIC Design Engineer Emulation(HAPS Engineer) Location: San Jose, CA (Complete onsite) Experience: 8+ years (Relevant) What candidate will Be Doing: Map multi-million gate SoC designs onto prototyping platforms, creating design partitions, FPGA builds, and testbenches to simulate FPGA components. Establish prototyping systems in the lab and contribute to defining, evolving, and supporting our prototyping methodology. Option to engage in block-level RTL design or block or top-lev

EDVT Engineer (Electrical Design Verification and Test)

Recruitment.ai

San Jose, California, USA

Contract

Roles & Responsibilities: Participates on a project team of engineers involved in the specification, design, development, and test of hardware. Defines the unit and system level test processes and procedures.Performs complex system level unit and integration test. Debug/Mitigate complex system level problems.This engineer will work closely with hardware design engineers, software/diagnostic engineers, and manufacturing test engineers to determine a product test strategy, develop the necessary s

Senior Staff Engineer, ASIC Design

Samsung Electronics America

San Jose, California, USA

Full-time

Please Note: To provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period. Advancing the World's Technology Together Our technology solutions power the tools you use every day--including smartphones, electric vehicles, hyperscale data centers, IoT devices, and so much more. Here, you'll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries of

Sr. Mechanical Design Engineer, Battery Structures Design

Tesla Motors

Palo Alto, California, USA

Full-time

The Structural Design team is comprised of passionate engineers who love to solve challenging problems and want to create the best electric vehicles in the world. We support each other on our journey to become better engineers and redefine what people come to expect from transportation. While accelerating the transition to sustainable energy is a challenging opportunity, we surround ourselves with fun and creative teammates to develop technology the world has never seen. The Battery Engineering

Electrical Design and Verification Test

Laiba Technologies LLC

San Jose, California, USA

Contract, Third Party

Role : EDVT Engineer Location: San Jose, CA (Onsite role) 75% travel includes - 3-5 yrs of expr , in Hardware Testing with Verification expr. With Python and pearl exprs Knowledge of fundamental hardware blocks & subsystems - CPU/microcontrollers, LVDS signaling, PCIe, USB, clocking, signal integrity & power issues Debugging hardware and script development/debug skills. Ability to widely apply networking principles, theories and field concepts to product test Ability to draw parallels betwee

Staff Engineer, SOC Design

Samsung Electronics America

San Jose, California, USA

Full-time

Please Note: To provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period. Advancing the World's Technology Together Our technology solutions power the tools you use every day--including smartphones, electric vehicles, hyperscale data centers, IoT devices, and so much more. Here, you'll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries of

Infra Silicon Physical Design Engineer

Cloudious

Sunnyvale, California, USA

Contract, Third Party

Title: Infra Silicon Physical Design Engineer Location: Bay Area, CA/Austin, TX Duration: 12 Months Qualification/Experience/Skills Required: - Hands-on tape-out experience performing timing and physical verification closure on 5nm FinFET TSMC process or similar/lower technology nodes - Hands-on experience with block level physical design (Floor planning to GDSII) - Experience with SoC level integration (multiple blocks, SoC floorplan, clocking, and timing analysis) preferred - Expertise in

Hardware Engineer | Hardware Design | Routers

Cisco Systems, Inc.

Milpitas, California, USA

Full-time

The application window has been extended and expected to close on 05/30/2025. The job posting may be removed earlier if the position is filled or if a sufficient number of applications are received. Meet the Team We are the team that is designing a new class of cutting-edge routers supporting the Internet for the future: Cisco 8000 Series routers. These are cloud-enhanced systems powered by groundbreaking Cisco Silicon One ASICs. These systems deliver the routing performance and functionalit

Internship, Mechanical Design Engineer, Optimus (Fall 2025)

Tesla Motors

Palo Alto, California, USA

Full-time

Consider before submitting an application: This position is expected to start around August or September 2025 and continue through the Fall term (ending approximately December 2025) or continuing into Winter/Spring 2026 if available and there is an opportunity to do so. We ask for a minimum of 12 weeks, full-time and on-site, for most internships. Our internship program is for students who are actively enrolled in an academic program. entry level candidates seeking employment after graduation a

ASIC Engineer (Design Verification)

Cloudious

Sunnyvale, California, USA

Contract, Third Party

ASIC Engineer (Design Verification) Bay Area, CA or Austin, TX 12 Months Responsibilities Define and implement IP/SoC verification plans, build verification test benches to enable IP/sub-system/SoC level verification. Develop functional tests based on verification test plan. Drive Design Verification to closure based on defined verification metrics on test plan, functional and code coverage. Debug, root-cause and resolve functional failures in the design, partnering with the Design team. Collab