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GPU Verification Engineer

Wise Equation Solutions Inc.

San Jose, California, USA

Full-time

Role: GPU Verification Engineer Location: Austin TX/ San Jose, CA (Onsite) Full Time Hire or Contract W2 Job Description: Senior ASIC Verification Engineer to work on GPU Top Verification ASIC verification experience including development of verification strategy, test plans, tests, testbench components as well as regression triage, debug, and coverage closure Expertise in C, C++, and System Verilog Experience with industry standard design, verification, and debug tools Strong programming and s

Defense Sr. FPGA Design Verification Engineer with Secret Clearance

ZoeTech Staffing LLC

Columbia, Maryland, USA

Full-time

Job Description: Our defense client is seeking digital verification engineers to support our development of secure tactical communication products. The candidate will function primarily in an FPGA verification role, working in a cooperative team environment to verify and test embedded FPGA firmware for radio communication systems. Successful candidates must have familiarity with a coverage-driven verification methodology from planning through closure as well as knowledge of industry standard int

Design Verification Engineer RISC-V CPU Development

Xpeerant Incorporated

Portland, Oregon, USA

Full-time

Design Verification Engineer RISC-V CPU Development Are you passionate about cutting-edge CPU architecture and ready to take your verification skills to the next level? We re partnering with a global leader in RISC-V processor design to find talented Design Verification Engineers to join their high-impact VLSI team. You ll work alongside seasoned architects and engineers to verify next-generation RISC-V CPU cores, develop test benches from the ground up, and help shape the future of custom CPU I

Digital SoC Design Verification Principal Engineer/Manager

Island Staffing

San Jose, California, USA

Full-time

Digital SoC Design Verification Principal Engineer/Manager 140-225K (+ Pre-IPO Stock Options) San Jose, CA (hybrid 1 day/week remote, 4 days/week onsite) We are looking for an experienced Digital SoC Design Verification Principal Engineer/Manager to lead a team of engineers in developing innovative Open RAN SoC functional blocks for 5G cellular base stations. In this role, you will be responsible for driving the development of high-quality digital solutions and contributing to product definition

Software Verification Engineer

SAIC

Middletown, Rhode Island, USA

Full-time

Job ID: 2506962 Location: MIDDLETOWN, RI, US Date Posted: 2025-06-24 Category: Information Technology Subcategory: Embedded SW Engr Schedule: Full-time Shift: Day Job Travel: No Minimum Clearance Required: None Clearance Level Must Be Able to Obtain: Secret Potential for Remote Work: No Description SAIC is seeking Software Verification Engineers to support the US Navy in Middletown, RI. JOB DESCRIPTION: Performs software verification activities for a large test system containing deskt

UVM Digital Verification Engineer

Draper

Boston, Massachusetts, USA

Full-time

Job Description Summary: Draper's Digital Design Team is seeking a motivated and experienced UVM Digital Verification Engineer to tackle novel verification challenges in FPGAs and ASICs. In this role, you will apply modern verification strategies to complex digital and mixed-signal designs in the areas of embedded security, cryptography, signal and image processing, navigation and communications. Job Description: Duties/Responsibilities Design and simulate circuits at transistor-level to implem

validation verification Engineer

Data Systems Integration Group

Manassas, Virginia, USA

Contract, Third Party

Job Title: Sr. Systems Engineer Duration: 12+ month Work Location: Manassas, Viginia (Onsite daily) NOTE:** Candidate will need to go to Santa Clara for 3-4 weeks in beginning of project to train with the team. Primary Responsibilities 1. Perform prototype bring-ups, tackle tough system and board level issues. 2. Run system tests. Collect and report on testing results. Screen modules and boards as part of testing and debug. 3. Create and develop test plans for new features on each product. Recom

Principal Design Verification Engineer

OSI Engineering, Inc.

San Jose, California, USA

Full-time

Principal Design Verification Engineer A leading chip and silicon IP provider focused on accelerating and securing data is looking to hire an outstanding Principal Design Verification Engineer to join its Memory Interface Chip (MIC) team in San Jose, CA. This role offers the chance to work alongside top engineering talent on innovative products that push the boundaries of speed and data security. As a Principal Design Verification Engineer, you ll play a critical role in the development of MIC

AMS Design Verification Engineer (Custom SC)

Texas Instruments

Dallas, Texas, USA

Full-time

Job Description Change the world. Love your job. This position offers a great opportunity to work on some of TI's most advanced custom products. As an AMS DV Engineer, you will have responsibility for driving design execution excellence across the company on projects for TI's largest customer. You'll work closely with design, systems, verification, characterization, test and product engineers to define, develop, and productize the best chip design for custom semiconductor devices. This role is

ASIC Engineer, Design Verification

Meta Platforms, Inc. (f/k/a Facebook, Inc.)

Remote

Full-time

Meta Platforms, Inc. (f/k/a Facebook, Inc.) has the following positions in Menlo Park, CA ASIC Engineer, Design Verification: Define and implement IP/SoC verification plans, build verification test benches to enable IP/sub-system/SoC level verification and develop functional tests based on verification test plan. Telecommute from anywhere in the U.S. permitted. (ref. code REQ-2506-152460: $238,228/year - $287,650/year). Individual pay is determined by skills, qualifications, experience, and loca

Test, and Verification Systems Engineer Integration

Booz Allen Hamilton

El Segundo, California, USA

Full-time

Job Number: R0217931 Integration, Test, and Verification Systems Engineer The Opportunity: Are you looking for an opportunity to combine your technical skills with big picture thinking to make an impact in modernizing position, navigation and timing systems? You understand your customer's environment and how to develop the right systems for their mission. Your ability to translate real-world needs into technical specifications makes you an integral part of delivering a customer focused engineeri

Staff Systems Verification Engineer

Abbott Laboratories

Pleasanton, California, USA

Full-time

Abbott is a global healthcare leader that helps people live more fully at all stages of life. Our portfolio of life-changing technologies spans the spectrum of healthcare, with leading businesses and products in diagnostics, medical devices, nutritionals and branded generic medicines. Our 114,000 colleagues serve people in more than 160 countries. Job Title Staff Systems Verification Engineer Working at Abbott At Abbott, you can do work that matters, grow, and learn, care for yourself and fa

Design Verification

Xpeerant Incorporated

San Jose, California, USA

Contract

Xpeerant prides itself in assisting our customers to achieve Market Window success by identifying and placing critical resource requirements. Securing the right talent is the most critical component of any project and directly relates to the success of any business. Market opportunities wait for no one. Finding the ideal fit is what Xpeerant has done for the last 26 years! We have a DV contract located in San Jose, CA. Someone with good design and verification experiences on protocol and proce

ASIC Engineer, Formal Verification

Veear

Sunnyvale, California, USA

Contract

Requirements: Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience.5+ years of experience in Formal VerificationExperience with Formal Verification applications including Datapath, sequential equivalence, Xprop, Clock Gating, connectivity etcProven understanding of Formal Verification methodologies, complexity reduction techniques and abstraction techniquesProven analytical skills to craft Client solutions to tackle industry-le

Design Verification Engineer

Avance Consulting

Mountain View, California, USA

Contract

Job Description Strong understanding of SV and UVM and good debugging skills. Understanding of AMBA protocols. Understand design specs and develop test plans based on functional and architectural requirements Build UVM/System Verilog-based verification environments for IP/subsystem/SoC level testing Develop directed and random testcases, perform coverage analysis, and close functional/code coverage Debug simulation failures and work closely with RTL designers to resolve issues Execute regressio

Design Verification Engineer

Innova Solutions, Inc

Mountain View, California, USA

Contract

A client of Innova Solutions is immediately hiring for a Design Verification Engineer Position type: Contract Location: Mountain View, CA-Onsite As a Design Verification Engineer, you will be responsible for: Job description: Strong understanding of SV and UVM and good debugging skills.Understanding of AMBA protocols.Understand design specs and develop test plans based on functional and architectural requirements.Build UVM/System Verilog-based verification environments for IP/subsystem/SoC leve

CPU Verification ENgineer

TalentBridge

Menlo Park, California, USA

Contract

CPU/SOCS VERIFICATION ENGINEER Location: Menlo Park, CA 94025 ( 5 Days onsite ) Duration: 12 months + extension Job Summary: As a CPU Verification Engineer, you will be a key member of the design verification team at to deliver our high-quality next generation AI integrated, cloud-native server class SoCs. You will be responsible for defining verification strategies and architecting solutions for complex verification problems. You will partner with stakeholders in adjacent domains and enable

Senior SOC/ASIC Verification Engineer

GAC Solutions Inc.

Phoenix, Arizona, USA

Full-time, Part-time, Contract, Third Party

Role: Senior SOC/ASIC Verification Engineer Location: Arizona - Onsite Contract We're seeking an experienced Design Verification Engineer with 8 10 years of hands-on expertise in SystemVerilog/UVM, EDA tools (Synopsys/Cadence), and scripting (Python, TCL, Perl). Must have experience in functional verification, assertions, and emulation, with a strong track record in ASIC development. Background in verifying GPU/CPU, high-speed interfaces (PCIe, DDR), or data center applications is a plus.

Verification Engineer

AdientOne LLC

Massachusetts, USA

Contract

Role: Verification Engineer Location: Boxborough MA 01719 | Hybrid Duration: 12+ months Note: Prefer experience with PSS language and UVM Job Description: Participate in the functional verification of a block(s) of complex ASICs and/or IP cores for a combined CPU/GPU development effort. Be part of a team of design and verification engineers, working closely with other team members to understand and verify the functionality of a given design element within the context of the block, chip and ove

Hardware Design Engineer

Talent Software Services, Inc

Redmond, Washington, USA

Contract

Hardware Design Engineer 5Job Summary: Talent Software Services is in search of a Hardware Design Engineer for a contract position in Redmond, WA. The opportunity will be six months with a strong chance for a long-term extension.Primary Responsibilities/Accountabilities: Purpose of the Team: The team focuses on designing verifications for OVL programs (OVL1 and OVL3) and various designs in host networking groups. Key projects: Verification designs and writing test bench code. Performance will be