verilog Jobs in california

121 - 140 of 175 Jobs

Senior RTL Analysis Methodology EngineerJob Title - Senior RTL Analysis Methodology Engineer

NVIDIA CorporationCompany Name - NVIDIA Corporation

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Santa Clara, California, USA

Full-time

NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It's a unique legacy of innovation that's fueled by great technology-and amazing people. Today, we're tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what's never been done before takes vision, innovation, and the world's best talent.

Senior Synthesis Flow CAD EngineerJob Title - Senior Synthesis Flow CAD Engineer

NVIDIA CorporationCompany Name - NVIDIA Corporation

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Santa Clara, California, USA

Full-time

NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI - the next era of computing. NVIDIA is a "learning machine" that constantly evolves by adapting to new opportunities which are hard to solve, that only we can pursue, and that matter to the world. This is our life's work, to amplify huma

Embedded Software EngineerJob Title - Embedded Software Engineer

Aduril IndustriesCompany Name - Aduril Industries

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Costa Mesa, California, USA

Full-time

Anduril Industries is a defense technology company with a mission to transform U.S. and allied military capabilities with advanced technology. By bringing the expertise, technology, and business model of the 21st century's most innovative companies to the defense industry, Anduril is changing how military systems are designed, built and sold. Anduril's family of systems is powered by Lattice OS, an AI-powered operating system that turns thousands of data streams into a realtime, 3D command and c

Sr Staff Firmware/Software EngineerJob Title - Sr Staff Firmware/Software Engineer

Marvell Semiconductor Inc.Company Name - Marvell Semiconductor Inc.

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Santa Clara, California, USA

Full-time

About Marvell Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and be

Embedded Software Engineer, Electronic WarfareJob Title - Embedded Software Engineer, Electronic Warfare

Aduril IndustriesCompany Name - Aduril Industries

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Costa Mesa, California, USA

Full-time

Embedded Haskell DeveloperJob Title - Embedded Haskell Developer

Aduril IndustriesCompany Name - Aduril Industries

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Costa Mesa, California, USA

Full-time

Mixed-Signal Design Verification EngineerJob Title - Mixed-Signal Design Verification Engineer

Talent Junction, LLC.Company Name - Talent Junction, LLC.

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San Jose, California, USA

Third Party, Contract

Title: Mixed-Signal Design Verification Engineer Location: San Jose, CA Key Technical Skills:UVM/System Verilog, Python, Synopsys/Cadence EDA Verifications Tools, AMS Verification Required Experience/Skills: Good knowledge of System-Verilog RTL coding including state machines, adders, multipliers, combinatorial logic, etc. Good understanding of digital design for mixed signal control loops and designing Verilog / Verilog- A code to control analog circuits (e.g. bandgap, PLL, Amplifier, Filters

Senior ASIC Design EngineerJob Title - Senior ASIC Design Engineer

PeopleNTechCompany Name - PeopleNTech

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San Jose, California, USA

Third Party, Contract

What candidate will Be Doing: Map multi-million gate SoC designs onto prototyping platforms, creating design partitions, FPGA builds, and testbenches to simulate FPGA components.Establish prototyping systems in the lab and contribute to defining, evolving, and supporting our prototyping methodology.Option to engage in block-level RTL design or block or top-level IP integration.Collaborate with Software, Design, and Verification teams to validate the functional and performance objectives of the S

RTL EngineerJob Title - RTL Engineer

CloudiousCompany Name - Cloudious

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Santa Clara, California, USA

Contract

Title: RTL Engineer Location: Santa Clara, CA (Day-1 onsite) Duration: 6 Months Role: Integrate RISC-V Core to SoC Key Responsibilities Integrate RISC-V CPU cores into SoC designs, collaborating with cross-functional teams (DV, physical design, architecture, verification, and post-silicon validation) to ensure seamless delivery. Develop and optimize RTL (using Verilog/SystemVerilog) for core, interconnect, and memory subsystems. Evaluate and integrate third-party IP, ensuring performance, power,

RTL Engineer: Integrate RISC-V Core to SoCJob Title - RTL Engineer: Integrate RISC-V Core to SoC

Intelliswift Software IncCompany Name - Intelliswift Software Inc

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Santa Clara, California, USA

Contract

Job Title: RTL Engineer: Integrate RISC-V Core to SoC Location(s): Santa Clara, CA - Onsite Must Have skills: 5+ years of experience in RTL design, SoC integration, or related areas.Strong hands-on experience with hardware description languages (Verilog, SystemVerilog, VHDL), EDA tools, and simulators (VCS, NC, Verilator).Deep understanding of SoC design, integration, and high-performance interfaces (e.g., AXI, TileLink, PCIe, Ethernet).Proven ability to debug and optimize designs for functiona

SDC EngineerJob Title - SDC Engineer

PeopleNTechCompany Name - PeopleNTech

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San Jose, California, USA

Contract, Third Party

Must have/Primary skills: Full chip timing, SDC changes back to block level, Block/Full chip SDC development, Static Timing Analysis, Primetime/Tempus What You'll Be Doing: Being a member of design team who oversees full chip SDCs and works with physical design and DFT teams to close full chip timing in multiple timing modes.Option to also do block level RTL design or block or top-level IP integration.Helping develops efficient methodology to promote block level SDCs to full chip, and to bring f

Verification EngineerJob Title - Verification Engineer

Info Way SolutionsCompany Name - Info Way Solutions

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San Francisco, California, USA

Full-time

Verification Engineer Location - Bay Area, CA Type: Full Time Qualifications ME/BE in Electrical Engineering, Computer Engineering, or related field.Experience: A MINIMUM of 8-15 years in ASIC verification in the area of data center networking.Verification Skills: Expertise in Hardware Verification and Hardware Verification Methodology (e.g., System Verilog, OVM/VMM/UVM) with a strong understanding of ASIC Design and Verification flow. Experience with functional coverage, gate/timing/power simul

Physical Design EngineerJob Title - Physical Design Engineer

Marici SolutionsCompany Name - Marici Solutions

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San Jose, California, USA

Contract

Position: Physical Design Engineer Location: San Jose CA (Day-1 Onsite) Long Term Contract Must have/Primary skills: Fullchip timing, SDC changes back to block level, Block/Full chip SDC development, Static Timing Analysis, Primetime/Tempus What You'll Be Doing: Being a member of design team who oversees fullchip SDCs and works with physical design and DFT teams to close fullchip timing in multiple timing modes.Option to also do block level RTL design or block or top-level IP integration.Helpin

Block/full chip SDC Design Verification Engineer(Static Timing Analysis, Analyzer tools, Spyglass CDC)Job Title - Block/full chip SDC Design Verification Engineer(Static Timing Analysis, Analyzer tools, Spyglass CDC)

Wise Equation Solutions Inc.Company Name - Wise Equation Solutions Inc.

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San Jose, California, USA

Contract

Position: SDC Engineer Location: San Jose CA(5 Days a week ONSITE) Long Term Contract Must have/Primary skills: Fullchip timing, SDC changes back to block level, Block/Full chip SDC development, Static Timing Analysis, Primetime/Tempus What You'll Be Doing: Being a member of design team who oversees fullchip SDCs and works with physical design and DFT teams to close fullchip timing in multiple timing modes.Option to also do block level RTL design or block or top-level IP integration.Helping dev

Design Verification Engineer (GPU)Job Title - Design Verification Engineer (GPU)

BayOne SolutionsCompany Name - BayOne Solutions

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San Jose, California, USA

Contract

Job Title - Design Verification Engineer (GPU) Duration 9 + Month (With the possibility of extension) Location:- San Jose (Onsite) Pay Rate :- $100/hr. - 120/hr. on w2 Description As a GPU Design Verification Engineer, your talents will ensure the quality at the heart of our GPU architecture. Creativity is a necessity to overcome the challenges inherent to verifying the proper operation of our low-power GPU. Versatility and broad knowledge of state-of-the-art verification techniques including th

Senior ASIC Design EngineerJob Title - Senior ASIC Design Engineer

PeopleNTechCompany Name - PeopleNTech

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San Jose, California, USA

Contract, Third Party

Position: Senior ASIC Design Engineer Location: San Jose, CA (Complete onsite) Experience: 8+ years (Relevant) What candidate will Be Doing: Map multi-million gate SoC designs onto prototyping platforms, creating design partitions, FPGA builds, and testbenches to simulate FPGA components. Establish prototyping systems in the lab and contribute to defining, evolving, and supporting our prototyping methodology. Option to engage in block-level RTL design or block or top-level IP integration. Colla

Senior Design Verification EngineerJob Title - Senior Design Verification Engineer

PeopleNTechCompany Name - PeopleNTech

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Mountain View, California, USA

Contract, Third Party

Position: Senior Design Verification Engineer Location: Mountainview, California Experience: 7 to 12 years What candidate will Be Doing: Strong expertise along-with complex SoC/IP debug is mustAt-least 5+ years of experience in System Verilog HVL and C/C++.AMBA AXI bus along-with ARM or C based processorBi-frost/Processor based C and SV/UVM mix Verification. What we are looking for: A bachelor s degree in electrical or computer engineering, accompanied by a minimum of 8 years of experience in

Principal Verification EngineerJob Title - Principal Verification Engineer

OSI Engineering, Inc.Company Name - OSI Engineering, Inc.

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San Jose, California, USA

Full-time

A leading chip and silicon IP provider is looking to hire a talented Principal Verification Engineer to join its Memory Interconnect Design team in either San Jose, CA or Morrisville, NC. This is a great opportunity to work alongside some of the industry's top engineers to help develop cutting-edge technologies that accelerate and secure data. In this full-time role, the Principal Verification Engineer will report to the Director of Design Engineering and take a key role in product development a

Design Verification EngineerJob Title - Design Verification Engineer

Mirafra IncCompany Name - Mirafra Inc

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San Jose, California, USA

Full-time

Experience: 6 to 15+ years of experience. Job Requirements are as below: Architect block and full-chip verification environments using HVLs and constrained random techniques for SOCs with embedded CPUs and mixed signal interfaces. Requires UVM, System Verilog, SVA Develop test plans and coverage metrics from specifications and write block and chip-level tests in C,SV,UVM Debug RTL and Gate simulations and work with design engineers to verify fixes. Write diagnostics for validation of FPGA prot

Senior Analog Design Analog EngineerJob Title - Senior Analog Design Analog Engineer

OSI Engineering, Inc.Company Name - OSI Engineering, Inc.

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Agoura Hills, California, USA

Full-time

A leading chip and silicon IP company is seeking a talented Senior Analog IC Design Engineer to join its Bufferchip Design team in Agoura Hills, California. This is an exciting opportunity to work alongside some of the brightest minds in the industry on innovative products that enhance data speed and security. In this full-time role, the Senior Analog IC Design Engineer will report to the Senior Director of Engineering and play a key role in product definition and design. The position offers hig