Job Title: Principal Digital Verification Engineer
Primary Location: Chandler, Arizona, USA
Role Summary: The Advanced Power Systems group within NXP's Power and Energy Business Line is seeking a Senior Digital Verification Engineer to develop next-generation Power Management ICs (PMICs) for automotive and industrial applications. This role will lead digital verification from architecture review through verification signoff, ensuring functionality, quality, reliability, and compliance.
Job Responsibility: - Lead digital verification activities and drive successful project execution from planning through signoff.
- Define verification plans, methodologies, environments, regressions, coverage goals, and signoff criteria.
- Review product requirements, architecture specifications, microarchitecture, interfaces, and implementation plans.
- Develop and maintain advanced verification environments using SystemVerilog, UVM, VIPs, scoreboards, monitors, checkers, and assertions.
- Create directed and constrained-random test scenarios to validate functionality, performance, robustness, and corner-case behavior.
- Define, implement, and analyze functional, code, and assertion coverage; drive coverage closure and signoff.
- Apply SystemVerilog Assertions (SVA), formal verification methodologies, and regression analysis to identify and resolve issues.
- Verify PMIC digital control, telemetry, diagnostics, safety, power sequencing, fault management, communication interfaces, and embedded control functions.
- Deliver verification collateral including test plans, environments, assertions, regressions, coverage reports, metrics, milestones, and requirements traceability.
- Drive methodology improvements, automation, reuse, and productivity while mentoring junior engineers and collaborating across global teams.
Job Qualification:- BSEE with 8+ years, MSEE with 5+ years, or PhD with 3+ years of semiconductor industry experience.
- Strong understanding of digital design fundamentals, FSMs, CDC, reset architecture, low-power design, and SoC integration.
- Expertise in Verilog, SystemVerilog, UVM/OVM, and class-based verification methodologies.
- Strong knowledge of constrained-random, coverage-driven verification, regression automation, and verification signoff.
- Hands-on experience developing testbenches, drivers, monitors, scoreboards, assertions, and reusable verification IP.
- Experience with SystemVerilog Assertions (SVA), formal verification techniques, and low-power verification methodologies such as UPF/CPF.
- Knowledge of industry-standard protocols including AMBA, I C, SPI, UART, CAN, LIN, DDR, and PCIe.
- Proficiency in Python, Perl, and UNIX/Linux shell scripting for automation.
- Familiarity with FPGA, emulation, or prototyping platforms such as HAPS, Palladium, or Zebu is a plus.
- Understanding of PMIC architectures and power management concepts is highly desirable.
- Experience using AI/LLM-based technologies to improve engineering productivity is a plus.
- Strong analytical, debugging, problem-solving, communication, leadership, mentoring, and cross-functional collaboration skills.
NXP Introduction: NXP Semiconductors N.V. (NASDAQ: NXPI) enables a smarter, safer and more sustainable world through innovation. As the world leader in secure connectivity solutions for embedded applications, NXP is pushing boundaries in the automotive, industrial & IoT, mobile, and communication infrastructure markets.
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Commitment At NXP. We recognize NXP is a powerful change agent as we continue to deliver innovative solutions that advance a more sustainable future. We remain steadfast in our commitment to sustainability and making measurable year-on-year progress. Also, we aim to create an inclusive work environment and we will not tolerate racism, discrimination or harassment of any kind. We have programs in place focused on diversity, inclusion and equality. Diversity, Equality and Inclusion | NXP Semiconductors
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NXP is an Equal Opportunity/Affirmative Action Employer regardless of age, color, national origin, race, religion, creed, gender, sex, sexual orientation, gender identity and/or expression, marital status, status as a disabled veteran and/or veteran of the Vietnam Era or any other characteristic protected by federal, state or local law. In addition, NXP will provide reasonable accommodations for otherwise qualified disabled individuals.
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