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RTL Design Engineer Wireless SoC (Remote PST)Location: Remote (must be aligned with PST time zone / willing to work PST hours) Rate: DOE We are seeking an experienced RTL Design Engineer to work on next-generation wireless SoC development. The ideal candidate will design and implement high-performance digital blocks and work closely with architecture, analog/mixed-signal, and verification teams to deliver production-quality silicon. Required Skills5+ years of hands-on RTL design experience (S

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Contract, Third Party

Depends on Experience

RTL Design Engineer

Remote

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Today

5+ years of hands-on RTL design experience (SystemVerilog / Verilog)Strong understanding of micro-architecture and RTL implementation from specsExperience in DSP hardware implementation (filtering, FFT, etc.)Knowledge of SoC design flows: CDC, power domains, timing constraints, formal verificationExperience with synthesis, linting, simulation, and STA toolsUnderstanding of DFT concepts (scan, BIST)Strong debugging and problem-solving skillsGood communication and ability to work in cross-function

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Contract

Depends on Experience

RTL Design Engineer Wireless SoC

No location provided

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Today

RTL Design Engineer Wireless SoC Location: Remote (must be aligned with PST time zone / willing to work PST hours) We are seeking an experienced RTL Design Engineer to work on next-generation wireless SoC development. The ideal candidate will design and implement high-performance digital blocks and work closely with architecture, analog/mixed-signal, and verification teams to deliver production-quality silicon. Required Skills 5+ years of hands-on RTL design experience (SystemVerilog / Verilog)

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Contract

ASIC/SoC RTL Design Engineer

San Jose, California

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Today

In-Person Interview Required! SoC RTL Design Engineer San Jose, CA: 100% Onsite 6 + Months $60-$62.50/HR Role: Design and develop advanced SoCs across architecture, RTL, and verification. Responsibilities: RTL design, verification, and debugging Support synthesis and timing closure Work with ARM cores, DDR, PCIe, Ethernet, and IP Collaborate with design and bring-up teams Qualifications: Experience in ASIC/SoC design and RTL coding Knowledge of ARM and standard I/O interfaces Dexian stands a

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Contract

$60 - $62.50 per hour

ASIC/ SoC RTL Design Engineer

Hybrid in Burlingame, California

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24d ago

Title: ASIC/SoC RTL Design Engineer Location: Palo Alto, CA (Or potentially Burlington, MA) Length of Contract: 6 months+ (Temp-to-Perm) Ideal Start: 6/1/2026 Responsibilities : Own end-to-end design of complex SoC subsystems, driving architecture, RTL implementation, and tapeout. Focus on high-performance Datapath, PPA optimization, and cross-functional integration across silicon, firmware, and system teams. Must haves: 8 12+ years in ASIC/SoC digital design with hands-on RTL ownershipStrong Sy

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Contract

$83 - $93

ASIC/RTL Design Engineer

Hybrid in San Jose, California

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2d ago

ASIC/RTL Design Engineer Location: San Jose, CA Duration : 12 months plus JOB DUTIES: The work will expose the designer to a number of IP including ARM cores, Ethernet, DDR, DMA, PCIE, SATA Successful candidates will be responsible for leading, and participating in, the design of leading edge SoCs in advanced digital CMOS processes. Our RTL Design Engineers are expected contribute in all aspects of SoC design including: Chip definition, Architecture development and modeling, Development of micr

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Contract

Depends on Experience

ASIC RTL Design Engineer - Onsite

San Jose, California

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3d ago

Title: ASIC RTL Design Engineer - Onsite Mandatory skills: SoC Architecture, ASIC design flow, RTL coding, debugging, verification, supporting synthesis, timing closure, ARM cores, I/O standard interfaces, Ethernet, DDR, DMA, PCIE, SATA, internal IPs, digital CMOS processes, SoC design, Chip definition, Architecture development, modeling, micro-architectural specifications, micro-architectural specifications, logic implementation, emulation, debug Description: JOB DUTIES: The work will expose th

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Contract

57 - 62

RTL Design Engineer / Design Verification Engineer

Remote

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Today

R-069895 RTL Design Engineer Wireless SoC (Remote PST) Location: Remote (must be aligned with PST time zone / willing to work PST hours) We are seeking an experienced RTL Design Engineer to work on next-generation wireless SoC development. The ideal candidate will design and implement high-performance digital blocks and work closely with architecture, analog/mixed-signal, and verification teams to deliver production-quality silicon. Required Skills 5+ years of hands-on RTL design experience (

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Full-time, Third Party

Depends on Experience

Design Engineer III - RTL-to-GDSII

Sunnyvale, California

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Today

Job Title: Design Engineer - RTL-to-GDSII Location: Dallas, TX or Sunnyvale, CA Duration: Contract - 11 months Pay Range: $75/hr $81/hr (W2) Job ID: 373412 About BCforward BCforward is a leading global IT consulting and workforce solutions firm providing services and support to Fortune 500 and government clients. Founded in 1998, BCforward has grown with our customers needs into a full-service business solutions provider. With delivery centers and offices across North America and India, we

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Contract

Compensation information provided in the description

Principal FPGA / RTL Design Engineer - Signal Processing

Los Angeles, California

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Today

Company Overview At Motorola Solutions, we believe that everything starts with our people. We're a global close-knit community, united by the relentless pursuit to help keep people safer everywhere. We build and connect technologies to help protect people, property and places. Our solutions foster the collaboration that's critical for safer communities, safer schools, safer hospitals, safer businesses, and ultimately, safer nations. Connect with a career that matters, and help us build a safer

Full-time

USD 175,000.00 - 225,000.00 per year

Integration RTL Design Engineer

San Jose, California

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Today

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the wo

Full-time

USD 145,600.00 per year

Senior FPGA / RTL Design Engineer - Signal Processing

Los Angeles, California

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Today

Full-time

USD 125,000.00 - 195,000.00 per year

Senior Engineer, GPU RTL Design - Pixel Pipe

San Jose, California

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Today

Position Summary Samsung, a world leader in advanced semiconductor technology, is founded on a simple philosophy - the endless pursuit of excellence will create a better world for all. At Samsung Austin Research and Development Center (SARC) and Advanced Computing Lab (ACL), we are building a center of excellence for Intellectual Property (IP) that is applied to high-performance computing devices (mobile, automotive, and other custom market segments) consumed by millions of people around the wo

Full-time

USD 139,000.00 - 208,400.00 per year

Senior Engineer, RTL Design

San Jose, California

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Today

Please Note: To provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period. Advancing the World's Technology Together Our technology solutions power the tools you use every day--including smartphones, electric vehicles, hyperscale data centers, IoT devices, and so much more. Here, you'll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries o

Full-time

USD 138,000.00 - 206,000.00 per year

Staff Engineer, RTL Design

San Jose, California

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Today

Full-time

USD 163,000.00 - 253,000.00 per year

Principal Product Engineer - RTL IPs & Design Verification

Natick, Massachusetts

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10d ago

Job Summary MathWorks has a hybrid work model that enables staff members to split their time between office and home. The hybrid model provides the advantage of having both in-person time with colleagues and flexible at-home life optimizations. Learn More: ;br> MathWorks is seeking a Product Marketing engineer to drive the success of our HDL, FPGA, and ASIC verification products. In this role, you will develop and execute targeted marketing strategies, collaborate with development and sales tea

Full-time

USD 144,600.00 - 231,400.00 per year

Staff Engineer, GPU RTL Power Management

Austin, Texas

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Today

Full-time

USD 151,000.00 - 226,600.00 per year

System IP / RTL Design Engineer

Austin, Texas

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Today

Job Description Vertical Technical Description Key responsibilities include: Work on RTL design of System IP blocks Work independently while closely collaborating with other designers as well as members of verification, physical design, performance and power teams Work on developing and maintaining Front-End Tools, Flows and Methodologies Work on creating scripts that automate repetitive daily tasks of team members Support Silicon bring-up activities Requirements Minimum requirements: Prof

Full-time

System IP/RTL Design Engineer_Austin, TX (Onsite)_only xoriant W2

Austin, Texas

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2d ago

Xoriant is an equal opportunity employer. No person shall be excluded from consideration for employment because of race, ethnicity, religion, caste, gender, gender identity, sexual orientation, marital status, national origin, age, disability or veteran status. TITLE:- System IP/RTL Design Engineer LOCATION Austin, TX (Onsite) DURATION 6+ Months (May get extend) MODE OF INTERVIEW Onsite RATE $90 per hour on W2 JOB DESCRIPTION Key responsibilities include: Work on RTL design of System IP block

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Contract

$80 - $90

Front-End Infrastructure Engineer (RTL/Design Verification)_Austin, TX (Onsite)_ only Xoriant W2

Austin, Texas

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2d ago

Xoriant is an equal opportunity employer. No person shall be excluded from consideration for employment because of race, ethnicity, religion, caste, gender, gender identity, sexual orientation, marital status, national origin, age, disability or veteran status. TITLE:- Front-End Infrastructure Engineer (RTL/Design Verification) LOCATION Austin , TX (Onsite) DURATION 6+ Months (May get extend) MODE OF INTERVIEW onsite RATE As per market (Only Xoriant W2 , no Vendor Employees) JOB DESCRIPTION The

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Contract

$70 - $90

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