About LeidosLeidos is a FORTUNE 500 company bringing a mix of innovative technology and sector expertise to customers in the national security, engineering, and health industries. We deliver innovative solutions through the efforts of our diverse and talented people who are dedicated to our customers' success. Guided by our Mission, Vision, and Values, Leidos empowers its teams, contributes to its communities, and operates sustainably-always with a commitment to doing the right thing for our customers, our people, and our community.
The Leidos
Intel Sector combines technology-enabled services and mission software capabilities in the areas of cyber, logistics, security operations, and decision analytics to support Intelligence Community customers as they address evolving national security challenges.
About the OpportunityLeidos is seeking an accomplished
Principal Hardware Design Engineer to provide technical leadership in the design, development, testing, and reverse engineering of advanced hardware solutions supporting mission-critical Government programs. As part of a multidisciplinary engineering team, you will serve as a senior technical authority, guiding complex engineering efforts, advancing innovative design methodologies, and helping shape the future direction of hardware engineering capabilities supporting national security missions.
Why This Role MattersMission success depends on engineers who not only solve today's technical challenges but also help define tomorrow's solutions. As a Principal Hardware Design Engineer, you will provide expert technical guidance across complex engineering efforts while developing innovative hardware solutions, advancing reverse engineering methodologies, and mentoring engineering teams. Your expertise will directly influence the development of critical hardware technologies that enable Intelligence Community operations.
What You'll DoHardware Design & Development- Direct the design, development, testing, and continuous improvement of advanced integrated circuits, hardware components, embedded firmware, and signal processing technologies.
- Lead complex hardware engineering initiatives while ensuring designs remain reliable, manufacturable, cost-effective, and aligned with mission objectives.
- Provide technical direction throughout the hardware development lifecycle, supporting successful delivery of complex engineering solutions.
- Collaborate across multidisciplinary engineering organizations to resolve challenging technical problems and ensure project success.
Physical Design & Implementation- Direct the application of ASIC and FPGA Place-and-Route (P&R) tools, engineering libraries, and physical implementation methodologies.
- Oversee integration of new P&R tools, design libraries, and technology updates into the Government's computer-aided design environment.
- Provide technical guidance for complex physical design, implementation, and optimization activities.
- Collaborate with tool and library vendors to evaluate and implement innovative engineering solutions.
Reverse Engineering & Analysis- Lead advanced reverse engineering efforts involving integrated circuits, firmware, and complex electronic components.
- Oversee de-processing activities and firmware retrieval using approved reverse engineering procedures.
- Develop novel reverse engineering methodologies supporting new component technologies and evolving mission requirements.
- Guide hardware adaptation efforts that modify vendor-manufactured hardware to satisfy specialized Government needs.
Technical Leadership & Innovation- Serve as an internal technical consultant, providing expert engineering guidance on the organization's most complex hardware design initiatives.
- Direct and review the technical work of Hardware Design Engineers while promoting engineering excellence and knowledge sharing.
- Mentor engineers across multiple experience levels, supporting technical growth and continuous learning.
- Evaluate emerging hardware technologies, engineering tools, and design methodologies to improve engineering capabilities and mission performance.
- Develop engineering best practices and technical standards that enhance design quality, innovation, and long-term maintainability.
This posting is for multiple opportunities.Required QualificationsClearance- TS/SCI with Polygraph, at time of Application, to be considered for the position.
Education- Bachelor's degree in Electrical Engineering or Computer Engineering from an accredited college or university.
- Five (5) additional years of hardware design engineering experience may be substituted for the required bachelor's degree.
Experience- Minimum of twelve (12) years of experience in integrated circuit or microelectronic component design or reverse engineering supporting programs or contracts of similar scope, type, and complexity.
Preferred Qualifications- Experience supporting Intelligence Community or other national security missions.
If you're looking for comfort, keep scrolling. At Leidos, we outthink, outbuild, and outpace the status quo - because the mission demands it. We're not hiring followers. We're recruiting the ones who disrupt, provoke, and refuse to fail. Step 10 is ancient history. We're already at step 30 - and moving faster than anyone else dares.
Original Posting:August 18, 2026
For U.S. Positions: While subject to change based on business needs, Leidos reasonably anticipates that this job requisition will remain open for at least 3 days with an anticipated close date of no earlier than 3 days after the original posting date as listed above.
Pay Range:Pay Range $131,300.00 - $237,350.00
The Leidos pay range for this job level is a general guideline only and not a guarantee of compensation or salary. Additional factors considered in extending an offer include (but are not limited to) responsibilities of the job, education, experience, knowledge, skills, and abilities, as well as internal equity, alignment with market data, applicable bargaining agreement (if any), or other law.
Never miss an opportunity! Create an alert based on the job you applied for..png?format=webp)