Company:
Qualcomm Technologies, Inc.
Job Area:
Engineering Group, Engineering Group > ASICS Engineering
General Summary:
Join QCOM Technologies Inc vibrant Global CAD team pushing the limits of gate-level synthesis and DFT stitch solutions for the Snapdragon chips powering billions of mobile devices.? The position requires Synthesis, DFT , Place and Route exposure and CAD development skills to define and develop implementation tools and methodologies for PPA, shortening design cycle time, in close collaboration with Snapdragon Design and Implementation teams. Qualcomm is using leading edge internal and EDA technologies in the Implementation domain, including pioneering in genAI/ML, and developing good-by-construction automation and PPA recipes for the most complex designs of the industry in terms of multi-voltage and Fmax-area-power goals.
This role?s responsibilities will include:
Improving the SoC Synthesis and DFT Stitch methodologies for diverse Mobile, Compute, AI, IoT Snapdragon chips.
Preferred Qualifications:
??? ?Bachelor of Masters degree or PhD in Computer Engineering, Electrical Engineering, or related field.
??? ?5-10 years of experience in VLSI CAD, preferably Synthesis, DFT and P&R
??? ?5-10 years of experience with scripting tools and programming languages: Python and TCL preferred.
Principal Duties and Responsibilities:
??? ?Participate in Synthesis and DFT Stitch flows enablement for foundry advanced process nodes.
??? ?Lead the EDA Vendors? roadmap on DFT stitch techniques, in collaboration with Snapdragon DFT and Implementation teams and DFT CAD team.
? Participate along with Qualcomm talented AI team to R&D initiatives driving differentiation in terms of die area reduction, dynamic power, performance and turn-around time.??? ?
??? ?Deep dive on Implementation issues, such as cell legalization issues, congestion hotspots, DFT stitch failures etc.
??? ?Interface and drive EDA vendor Application Engineers on the resolution of block convergence problems faced by the Snapdragon design teams.?
Minimum Qualifications:
? Bachelor\'s degree in Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience.
OR
Master\'s degree in Science, Engineering, or related field and 5+ years of ASIC design, verification, validation, integration, or related work experience.
OR
PhD in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.
Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mailor call Qualcomm\'s toll-free number found. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries).
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Pay range and Other Compensation & Benefits:
$164,000.00 - $246,000.00
The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Even more importantly, please note that salary is only one component of total compensation at Qualcomm. We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales-incentive plans are not eligible for our annual bonus). In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play. Your recruiter will be happy to discuss all that Qualcomm has to offer ? and you can review more details about our US benefits at this.
If you would like more information about this role, please contact .
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