Emulation Engineer San Jose, CA 12 + Months $55-57/HR Role: Support SoC/IP validation by building Palladium/ZeBu environments and porting RTL/UVM testbenches. Responsibilities: Develop Palladium/ZeBu emulation environments. Port RTL/UVM testbenches from simulation. Debug SoC/IP issues across RTL and firmware. Collaborate with DV, RTL, and SW teams for bring-up. Requirements: Exp: 3+ years in SoC/IP emulation. Tools: Palladium/ZeBu, SystemVerilog, and UVM. Skills: PCIe/AXI/DDR protocols and