3 results (0 new)
Santa Clara, California
•
4d ago
Strong understanding of: DFT concepts (Scan, ATPG, MBIST, JTAG) Digital design fundamentals Hands-on experience with: SystemVerilog and UVM Simulation tools such as VCS, Xcelium, or Questa Preferred Skills Familiarity with: ATPG tools (TetraMAX, Modus, FastScan) Debug tools (Verdi, DVE) Understanding of: Low-power design methodologies (UPF/CPF) Clocking and reset architectures
Easy Apply
Contract
50 - 60
Santa Clara, California
•
6d ago
Key Responsibilities: Develop and execute verification plans for DFx features including: Scan (stuck-at, transition fault) MBIST / LBIST Boundary Scan (JTAG) Memory repair and redundancy Low-power test scenarios Create and maintain testbenches using SystemVerilog/UVM for DFx validation. Verify: Scan chain integrity and connectivity Test mode functionality and coverage ATPG pattern validation and debug BIST controllers and memory test logic Technical Skills & Expertise: Strong knowledge of DFT/DF
Easy Apply
Third Party, Contract
Depends on Experience
San Jose, California
•
Today
WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the wo
Full-time
USD 145,600.00 per year
