Search Jobs | Dice.com

Job Details

Skills

Firmware
Computer Engineering
Data Analysis
IP
FPGA
Scripting
Interfaces
Electrical Engineering

Summary

Role:                   Emulation Build Engineer

Location:          Sunnyvale CA (Onsite)
 
 
 
 Summary 

We are seeking an Emulation Build Engineer to own the end-to-end process of building, compiling, and validating RTL design models targeting hardware emulation and prototyping platforms   specifically Cadence Palladium, Cadence Protium, and/or Synopsys ZeBu. You will be the critical bridge between RTL design teams and validation/software teams, ensuring that high-quality, synthesizable emulation models are delivered on schedule to enable early firmware development, hardware-software co-verification, and system-level validation.
 
 
 
 Key Responsibilities

```
Emulation Model Build & Compilation
```

Build, compile, and optimize RTL-to-gate/behavioral models targeting Palladium, Protium, and/or ZeBu emulation platforms

Own the emulation build flow from RTL ingestion through synthesis, partitioning, mapping, place-and-route, and bitstream/image generation

Resolve synthesis and compilation errors including unresolved modules, black-box instantiation, clock/reset inference, memory mapping, and multi-driver conflicts

Implement and maintain RTL waivers, workarounds, and design abstraction (memory wrappers, analog stubs, IP replacements) to achieve clean compilations

Optimize build configurations for compile time, resource utilization, emulation speed (MHz), and capacity across target platforms

Manage incremental and hierarchical build strategies to reduce turnaround time for design iterations

Support multi-domain and multi-clock designs with proper clock modeling and domain crossing handling

 
 Required Qualifications  
Education: B.S./M.S. in Electrical Engineering, Computer Engineering, or related field

Experience: 3 8+ years in emulation model build, FPGA prototyping, or related hardware compilation roles

Hands-on experience with one or more emulation/prototyping platforms: 
 
 
Model Validation & Quality

Validate emulation models through sanity tests, boot tests, and golden-reference comparisons against RTL simulation

Ensure functional equivalence between RTL simulation and emulation by running correlation test suites

Debug and resolve model mismatches (simulation vs. emulation) due to synthesis artifacts, X-state handling, timing differences, or initialization issues

Validate memory models, I/O interfaces, and transactor/synthesizable BFM integration

Perform coverage analysis on emulation models and track model quality metrics

Maintain a regression suite for build-level validation (smoke tests, connectivity checks)

 
 Infrastructure & Automation

Develop and maintain automated build pipelines (CI/CD) for nightly/weekly emulation model builds

Create scripts and tools for build monitoring, error triage, capacity tracking, and build status reporting

Maintain version-controlled build configurations, design collateral, and release notes

Manage compute farm resources (LSF/SGE/Slurm) and optimize job scheduling for emulation builds

Track and manage platform licenses and capacity allocation across projects

Develop dashboards and metrics for build health, turnaround time, and platform utilization

  
Collaboration & Support

Partner with RTL design teams on design readiness, coding guidelines, and synthesizability best practices for emulation

Work with verification/validation teams to integrate transactors, probes, and debug infrastructure into emulation models

Collaborate with firmware/software teams to deliver validated models for early SW development and hardware-software co-validation

Coordinate with EDA vendor support (Cadence, Synopsys) for tool issues, feature requests, and platform upgrades

Support silicon bring-up teams with emulation-correlated debug and pre-silicon regression data

Participate in project planning to communicate build schedules, risks, and dependencies

Employers have access to artificial intelligence language tools (“AI”) that help generate and enhance job descriptions and AI may have been used to create this description. The position description has been reviewed for accuracy and Dice believes it to correctly reflect the job opportunity.

Dice Id: 90941404
Position Id: LAKSJJJDS
Posted 2 hours ago

Fitment

Dice Job Match Score™

🫥 Flibbertigibetting...

Contact the job poster

Imran Khan

Recruiter @ Tekfortune Inc.

View Profile

Create job alert

Never miss an opportunity! Create an alert based on the job you applied for.

Similar Jobs

Emulation Engineer

Hybrid in Saratoga, California

•

26d ago

Responsibilities Develop and deliver emulation models from RTL using synthesis, partitioning, and routing tools.Plan and execute simulation acceleration, emulation, and prototyping activities aligned with project milestones.Design and implement high-performance transactors and emulation testbenches using SystemVerilog and C/C++/DPI.Drive emulation methodologies for hardware verification and software/firmware development.Build system-level use cases for execution on emulators and support platform

Easy Apply

Full-time, Third Party

Depends on Experience

Senior Emulation Engineer

San Jose, California

•

Today

Senior Emulation Engineer Exp: 10+ years Location: San Jose Key Skills: Veloce, Palladium, or ZeBu, PCIe and UCIe and memory technologies such as LPDDR and HBM Set up and maintain Siemens Veloce emulation and prototyping platforms Adapt SoC designs for Emulation and Prototyping Develop and debug emulation testbenches and system-level environments Support pre-silicon validation, power/performance analysis, and early software bring-up. Participate in silicon bring-up and validation. Collabor

Easy Apply

Contract

Depends on Experience

Senior Emulation Engineer

San Jose, California

•

4d ago

Key Skills: Veloce, Palladium, or ZeBu, PCIe and UCIe and memory technologies such as LPDDR and HBM Set up and maintain Siemens Veloce emulation and prototyping platforms Adapt SoC designs for Emulation and Prototyping Develop and debug emulation testbenches and system-level environments Support pre-silicon validation, power/performance analysis, and early software bring-up. Participate in silicon bring-up and validation. Collaborate with design and verification teams to isolate design issues an

Easy Apply

Contract

50 - 90

CPU Emulation Engineer

Santa Clara, California

•

Today

Company: Qualcomm Technologies, Inc. Job Area: Engineering Group, Engineering Group > CPU Engineering General Summary: As a CPU Emulation Engineer, you will work as part of CPU verification team to deliver emulation-based solutions for CPU team. You will work closely with all disciplines of CPU team to help verify and validate high performance CPUs. Role and Responsibilities Work closely with CPU RTL, performance, verification and SW teams to deliver emulation-based solutions.Architect and de

Full-time

USD 167,100.00 - 250,700.00 per year

Filter Results

Job post features

Posted date

Work settings

Employment type

Distance

Employer type

Work authorization

Emulation Build Engineer

Skills

Summary

Dice Job Match Score™

Imran Khan

Similar Jobs

Emulation Build Engineer

Job Details

Skills

Summary

Dice Job Match Score™

Imran Khan

Similar Jobs