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THE ROLE As a member of the Data Center Platform Engineering (DPEG) organization, the Lead Firmware Architect will define and drive the firmware architecture strategy for AMD's next-generation AI infrastructure platforms. This highly visible technical leadership role is responsible for shaping scalable, secure, and serviceable firmware solutions that enable hyperscale AI training and inference deployments.
The successful candidate will work across silicon, platform hardware, systems architecture, software, security, and key hyperscale customers to develop rack-scale firmware architectures spanning BIOS, BMC, management controllers, telemetry, RAS, and platform security. This role requires a combination of deep hands-on technical expertise, architectural vision, and cross-functional leadership to bring world-class AI infrastructure solutions from concept to deployment.
You will help define industry-leading firmware frameworks, influence emerging standards, and solve the most challenging system-level problems in large-scale AI deployments.
THE PERSON You are an accomplished firmware architect with a passion for large-scale systems, platform innovation, and solving complex engineering challenges. You thrive at the intersection of silicon, firmware, hardware, and cloud infrastructure. You are equally comfortable defining long-term architectural roadmaps, debugging complex system interactions, and influencing cross-functional teams toward a common technical vision.
You possess strong technical depth in embedded firmware, system architecture, security, and manageability technologies, along with a proven track record of delivering scalable products into production environments.
KEY RESPONSIBILITIES - Define and drive the architecture of current and future AMD AI platform firmware solutions, spanning System management, telemetry, diagnostics, and serviceability.
- Architect scalable rack-level firmware frameworks optimized for hyperscale AI training and inference deployments.
- Lead firmware strategy and technical direction across platform bring-up, customer enablement, productization, and lifecycle management.
- Drive adoption of industry standards and emerging technologies including DMTF Redfish, SPDM, PLDM, MCTP, UEFI, ACPI, CXL, and OCP initiatives.
- Partner with silicon architecture teams to influence next-generation platform features, manageability capabilities, telemetry frameworks, and RAS implementations.
- Lead threat modeling, architecture reviews, and design assessments across firmware stacks.
- Define firmware interfaces between Control Plane, BMC, BIOS, GPUs, CPUs, network fabrics, and rack management infrastructure.
- Collaborate closely with hyperscale customers and ecosystem partners to drive platform requirements, feature development, and deployment readiness.
- Drive architectural decisions for fault management, telemetry collection, observability, diagnostics, and platform health monitoring.
- Mentor and develop engineering teams by establishing best practices for firmware architecture, secure development, code quality, and platform integration.
- Lead root cause analysis of complex system-level failures and translate operational learnings into scalable architectural improvements.
- Influence industry standards bodies and open-source communities to advance firmware technologies for AI infrastructure.
PREFERRED QUALIFICATIONS - Extensive experience in firmware, embedded systems, platform architecture, or low-level systems software development.
- Proven experience architecting complex embedded firmware solutions across server, accelerator, networking, or data center platforms.
- Strong expertise in platform firmware technologies including:
- IPMI and DMTF standards such as Redfish
- Embedded Linux-based systems
- Deep understanding of server platform architecture, including:
- x86 processors and GPU-accelerated systems
- Memory subsystems, High-speed I/O architectures
- Experience with modern AI infrastructure technologies such as:
- Experience designing firmware solutions for system management, telemetry, diagnostics, and RAS features in hyperscale environments.
- Hands-on experience debugging complex interactions across firmware, hardware, operating systems, drivers, and management software.
- Strong programming background in C/C++, embedded Linux, U-Boot, RTOS environments, and low-level system software.
- Experience with secure coding practices and static/dynamic analysis tools such as Coverity, Black Duck, or equivalent technologies.
- Demonstrated experience leading technical teams and influencing architectural decisions across multiple organizations.
ACADEMIC CREDENTIALS Bachelor's or Master's degree in Computer Engineering, Electrical Engineering, Computer Science.
WHY THIS ROLE IS EXCITING You will have the opportunity to influence the firmware architecture that powers some of the world's largest AI deployments. This role sits at the center of AMD's AI infrastructure strategy, shaping the technologies that enable next-generation accelerated computing at hyperscale.
This role is not eligible for visa sponsorshipBenefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.
AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD's "Responsible AI Policy" is available here.
This posting is for an existing vacancy.
