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Job Title: Design Engineer II-image signal processing (ISP)
Location: Remote. Onsite 3 days in Burlingame, CA preferred.
Duration: Contract - 8 months
Pay Range: $84 to $87/hr (W2)
Job ID: 409726
About BCforward
BCforward is a leading global IT consulting and workforce solutions firm providing services and support to Fortune 500 and government clients. Founded in 1998, BCforward has grown with our customers needs into a full-service business solutions provider. With delivery centers and offices across North America and India, we take pride in building long-term relationships and delivering excellence through innovation, collaboration, and integrity.
Job Description
We are seeking a Digital Design Engineer to own integration of the camera ingest path, including MIPI C/D-PHY and CSI-2 receivers, into the image signal processing (ISP) pipeline. The role will include development of the glue logic required to bridge CSI-2 and ISP interfaces and drive subsystem and chip-level integration through production.
Responsibilities:
- Integrate MIPI C-PHY/D-PHY, CSI-2 controller, and ISP IP at subsystem and chip level.
- Design and code glue logic between CSI-2 output and ISP input, including stream and virtual-channel handling, data-type unpacking, line and frame framing, pixel packing and width conversion, clock-domain crossing, backpressure, FIFO and buffering, and error and short-packet handling.
- Develop and maintain subsystem architecture and top-level RTL. Define register maps and configuration and control paths (APB/AHB/AXI).
- Drive subsystem and chip-level integration. Contribute to verification plan development and apply Design-for-Verification concepts.
- Extend and maintain Python-based integration and generation tooling for connectivity, register generation, IP assembly, and collateral checks.
- Support RTL-to-GDS activities including constraints, synthesis, timing closure, and low-power (UPF) intent for the camera subsystem.
- Collaborate with FPGA engineers on early prototyping and with validation on bring-up, test program support, and ramp to production maturity.
- Support hand-off and integration of blocks into the larger SoC environment.
Required Skills & Qualifications:
- 4+ years as a digital design engineer with SoC or subsystem integration ownership.
- Hands-on experience with MIPI C-PHY and/or D-PHY, CSI-2 protocol, and camera ISP pipelines.
- Strong Verilog/SystemVerilog RTL coding and digital architecture definition.
- Proven ability to write new glue and bridge RTL, including CDC, flow control, and data-path packing.
- Python scripting for integration tooling development and automation.
- Tcl scripting with familiarity in synthesis and static timing analysis.
- Experience with UPF-based simulation and low-power flows.
- Exposure to SystemVerilog UVM or OVM.
- Knowledge of cameras with direct experience in the field.
- Familiarity with AI-assisted code workflows.
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or equivalent experience.
Preferred Skills:
- Experience with MIPI DSI/display, PCIe, USB, or other high-speed interfaces.
- ISP algorithm and pipeline analysis with fixed-point data-path understanding.
- PHY and controller IP bring-up with PPI and lane-management debug.
- DFT and test-program definition with power-aware GLS exposure.
- FPGA prototyping and Tensilica DSP/TIE familiarity.
- Master's degree in Electrical Engineering or Computer Science.
Why BCforward?
At BCforward, we believe in advancing lives and careers. When you join our team, you gain access to:
- Competitive compensation and benefits.
- Opportunities for growth with global clients.
- A supportive, inclusive culture that values innovation and people.
- Exposure to cutting-edge technologies and projects.
About Our Commitment
BCforward is an equal opportunity employer. We value diversity and are committed to creating an inclusive environment for all employees. All qualified applicants will receive consideration for employment without regard to race, color, religion, gender, sexual orientation, gender identity, national origin, age, disability, or veteran status.
Fair Chance Notice
Pursuant to the California Fair Chance Act, Los Angeles County Fair Chance Ordinance for Employers, Los Angeles Fair Chance Initiative for Hiring Ordinance, and San Francisco Fair Chance Ordinance, qualified applicants will be considered for assignment with arrest and conviction records. Criminal history may have a direct, adverse, and negative relationship with some of the material job duties of this position. These include the duties and responsibilities listed above, as well as the abilities to adhere to company policies, exercise sound judgment, effectively manage stress and work safely and respectfully with others, exhibit trustworthiness, meet client expectations, standards, and accompanying requirements, and safeguard business operations and company reputation.
Interested? Apply Now!
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