Search Jobs | Dice.com

Job Details

Skills

Cross-functional Team
Product Design
Systems Architecture
Open Verification Methodology
Bash
Perl
Tcl
Python
Scripting
VHDL
Computer Hardware
Test Plans
SystemVerilog
UVM
Testing
Code Coverage
ASIC
Xilinx
FPGA
Training And Development
Research
Apache Flex
Health Care

Summary

As a Senior Cyber FPGA Design Verification engineer, you'll be a member of a cross functional team responsible for product design from system architecture & requirements allocation through product release and production of cost-sensitive secure products.

We encourage you to apply if you have any of these preferred skills or experiences: Experience with OVM / UVM design verification methodology: bash/csh, Perl, TCL, Python or similar scripting languages; VHDL or similar hardware description languages.

What sets you apart:

Experience defining verification methodology for complex FPGAs.
Ability to analyze requirements, create test plan, build and set up scalable simulation environments from the ground up using SystemVerilog/UVM
Familiarity with testing complex designs, code coverage, functional coverage, assertions.
Ability to work in a dynamic environment that includes working with changing needs and requirements.
FPGA/ASIC design experience is a plus.
Familiarity with Xilinx FPGA & Questa Advanced Functional Verification tools is a plus.
Team player who thrives in collaborative environments and revels in team success

Our Commitment to You:t

An exciting career path with opportunities for continuous learning and development.
Research oriented work, alongside award winning teams developing practical solutions for our nation's security
Flexible schedules with every other Friday off work, if desired (9/80 schedule)
Competitive benefits, including 401k matching, flex time off, paid parental leave, healthcare benefits, health & wellness programs, employee resource and social groups, and more

Employers have access to artificial intelligence language tools (“AI”) that help generate and enhance job descriptions and AI may have been used to create this description. The position description has been reviewed for accuracy and Dice believes it to correctly reflect the job opportunity.

Dice Id: 80183517
Position Id: 971a0dd7c29c1c9e5e22df4847cb9e53
Posted 7 hours ago

Fitment

Dice Job Match Score™

👤 Reviewing your profile...

Create job alert

Never miss an opportunity! Create an alert based on the job you applied for.

Similar Jobs

Senior Engineer, Design Verification

Westborough, Massachusetts

•

Today

About Marvell Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleetin

Full-time

USD 108,500.00 - 160,510.00 per year

ASIC/FPGA Design Verification Engineer (Teradyne, N. Reading, MA)

Reading, Massachusetts

•

Today

We are the global test and automation specialists, powering next-generation technologies through sophisticated solutions. Behind every electronic device you use, Teradyne's test technology ensures your device works right the first time, every time! Our portfolio of automation solutions help manufacturers to develop and deliver products quickly, efficiently and cost-effectively. Together, Teradyne companies deliver manufacturing automation across industries and applications around the world! We

Full-time

USD 98,700.00 - 157,900.00 per year

ASIC & FPGA Design Engineer Senior Staff

Andover, Massachusetts

•

Today

Job Description You will be the ASIC & FPGA Design Engineer for the Andover, MA Advanced Defense Systems team. Our group creates the programmable logic heart beats that power both current and next generation defense platforms, delivering high reliability, multi function modules on accelerated schedules. What You Will Be Doing As the ASIC & FPGA Design Engineer you will own the full life cycle of complex FPGA solutions-from initial specification through production release-while mentoring teamma

Full-time

USD 145,200.00 - 255,990.00 per year

Senior Principal Engineer, Design Verification

Westborough, Massachusetts

•

Today

Full-time

USD 204,900.00 - 303,250.00 per year

Filter Results

Job post features

Posted date

Work settings

Employment type

Distance

Employer type

Work authorization

FPGA Design Verification Engineer

Skills

Summary

Dice Job Match Score™

Similar Jobs

FPGA Design Verification Engineer

Job Details

Skills

Summary

Dice Job Match Score™

Similar Jobs