Hi,
My name is Deepankar, and I am a Sr. Recruiter with LinQ Global. I am reaching out regarding an exciting Firmware Engineer opportunity
If you are interested in learning more about this opportunity, please contact me directly at and send me a copy of your updated resume.
I’d like to share a brief overview of the position:
Role: Firmware Engineer
Location: Mountain View, CA
Duration: 18 months
Job Description:
We are seeking a Staff / Principal Firmware Engineer to architect and lead the firmware of a large, complex vehicle compute system. This role owns the low-level software that brings up hardware and enables networking, cameras, memory, and peripherals to operate reliably for the software layers above. Modern C++ is the preferred language, applied with the discipline required for real-time, resource-constrained targets.
The successful candidate will bring deep knowledge of the hardware/software interface, including peripheral registers, clocks, interrupts, DMA, camera pipelines, Ethernet connectivity, and the interaction between firmware, RTOS, and hardware under real timing, power, and fault conditions. The role owns firmware architecture and the technical roadmap across the product lifecycle—from silicon bring-up through validation, manufacturing, and deployment.
This is a hands-on technical leadership position. The engineer will remain directly involved in code development and hardware debugging while mentoring senior engineers and driving platform-wide architectural decisions.
Key Responsibilities
Firmware & Platform Architecture
- Architect and lead production firmware for vehicle compute platforms and ECUs based on microcontrollers and SoCs running RTOS or similar operating systems.
- Own firmware architecture and the hardware/software interface, including device drivers, board support packages, and platform initialization.
- Define boot and platform-initialization flows, including boot ROM handoff, bootloaders, secure boot, firmware updates, and memory initialization.
Hardware Interfaces, Drivers & Bring-Up
- Lead development of drivers and board support for I2C, SPI, UART, GPIO, CAN, memory and storage interfaces such as DDR, QSPI/NOR flash, eMMC, and UFS.
- Own clocks, resets, power sequencing, interrupts, DMA, caches, and memory maps.
- Lead Ethernet MAC/PHY bring-up and configuration, including MDIO, RGMII/SGMII, automotive Ethernet PHYs, switches, and lower network-stack layers.
- Lead camera and sensor paths, including image-sensor configuration, MIPI CSI-2 receivers, serializer/deserializer links, and control/timing integration.
- Lead silicon and board bring-up with hardware teams by reviewing schematics and datasheets and debugging signal-level issues.
RTOS, Reliability & Diagnostics
- Define RTOS architecture, task design, timing, concurrency, memory and CPU budgets, and power states; review designs for real-time correctness.
- Define on-target diagnostics and self-test architecture, including POST, memory/logic BIST, CPU and communication tests, and memory-load generation.
- Establish supply-voltage monitoring, safe-state entry, and controlled power-up/sleep sequences that meet quiescent-current targets.
- Establish CAN and Ethernet health-monitoring standards, including link integrity, cable faults, CRC/error detection, logging, and reporting.
C++ Engineering, SDKs & Testing
- Set embedded C++ engineering standards, including controlled dynamic allocation, exceptions and RTTI, templates, constexpr, code reviews, and static analysis.
- Drive host-based firmware unit testing with GoogleTest and GoogleMock, using mocked hardware-abstraction layers and drivers.
- Define SDK integration strategy for silicon-vendor SDKs, HALs, and BSPs, including versioning and clean C++ driver interfaces.
- Establish firmware unit, integration, and Hardware-in-the-Loop (HIL) testing standards and build test harnesses with test and platform engineers.
Technical Leadership
- Own the firmware technical roadmap and make architecture decisions across the platform.
- Mentor senior engineers and raise engineering standards for firmware design, code quality, and system reliability.
- Work closely with hardware, systems, platform, and test engineers throughout development and deployment.
Mandatory Requirements
- 8+ years of hands-on embedded firmware development, including firmware architecture leadership for complex, multi-processor systems.
- Expert-level modern C++ (C++14/17) as a primary language for resource-constrained, real-time firmware, with strong C programming skills for low-level and vendor code.
- Deep understanding of hardware/software interfaces, including datasheets, reference manuals, register-level programming, interrupts, DMA, caches, and memory maps.
- Proven experience developing low-level device drivers for microcontroller and SoC peripherals and on-chip controllers, from register-level bring-up through production-quality implementation.
- Strong experience with RTOS or similar operating systems, such as FreeRTOS, Zephyr, ThreadX, or QNX.
- Experience across multiple hardware domains, including Ethernet MAC/PHY networking, cameras and image sensors, I2C, SPI, UART, CAN, and memory/storage.
- Strong experience with 32-bit ARM microcontrollers and SoCs, including Cortex-M, Cortex-R, and/or Cortex-A.
- Hands-on hardware-debugging skills using oscilloscopes, logic analyzers, JTAG/SWD debuggers, and protocol analyzers, supported by sound electrical-engineering fundamentals.
- Proficiency with GoogleTest and GoogleMock, including host-based testing, hardware/RTOS mocking, and CI integration.
- Experience integrating silicon-vendor SDKs and HALs and designing clean C++ driver and platform APIs.
- Working knowledge of Python for tooling, automation, and testing.
- A test-driven approach to firmware quality and a track record of close collaboration with hardware and test engineers.
- Ability to reason end to end across firmware, silicon, and board-level behavior.
Core Technical Skills
Technical Area | Skills / Technologies |
Programming | Modern C++14/17, C, Python |
Embedded platforms | 32-bit ARM; Cortex-M / Cortex-R / Cortex-A; MCUs and SoCs |
Operating systems | FreeRTOS, Zephyr, ThreadX, QNX, RTOS concepts |
Drivers & interfaces | I2C, SPI, UART, GPIO, CAN, DMA, interrupts, clocks, resets |
Memory & storage | DDR, QSPI/NOR flash, eMMC, UFS, memory maps, caches |
Networking | Ethernet MAC/PHY, MDIO, RGMII/SGMII, automotive Ethernet, UDP/TCP |
Camera & sensors | Image sensors, MIPI CSI-2, serializer/deserializer links |
Platform software | BSP, HAL, silicon-vendor SDKs, bootloaders, secure boot |
Testing | GoogleTest, GoogleMock, unit/integration testing, HIL, static analysis |
Debugging | Oscilloscope, logic analyzer, JTAG/SWD, protocol analyzer |
Preferred / Nice-to-Have Qualifications
- Automotive industry experience, including ECU firmware, automotive processors such as NXP S32G/S32K or equivalent, and automotive networks.
- Knowledge of functional safety and process standards such as ISO 26262 and ASPICE; experience with safety-oriented RTOS such as SafeRTOS.
- Automotive diagnostics experience, including UDS, diagnostic trouble codes (DTCs), and tester interaction.
- Time synchronization and Time-Sensitive Networking, including PTP / IEEE 1588 and gPTP.
- Camera link technologies such as GMSL or FPD-Link, and image signal processor (ISP) bring-up.
- Secure boot, root of trust, and firmware security experience.
- Linux device-driver or bootloader development, including U-Boot.
Deepankar Chadha
Recruiter
LinQ Global Group
4478 Route 27, Suite 201
Kingston, NJ 08528-0615
Phone: +1
Email:
