Post Silicon Validation Engineer

Position: Post-Silicon Validation Engineer Location: San Jose, CA Key Skills: Post-Silicon Validation, Oscilloscope, Multimeters, Analysers, PCIe, Ethernet, Python, Perl Responsibility Conduct initial power-on, reset sequencing, clock bring-up, and strap configuration for complex networking ASICs or SoCsEValidate Ethernet (e.g., 100G/400G/800G) MAC/PHY and PCIe (Gen 4/5/6) interfaces for physical layer integrity.Develop, execute, and automate validation test plans and SDK-driven test environment