San Diego, California
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Detailed Job Description: Title: Design Verification Engineer/Engineer, Staff|6155 Location: San Diego California 92121 Duration: 12 months (Possible Extension) Pay rate: $65-$81/Hr on W2 without PTO Work authorization: , , EAD Shift: 1st JOB DESCRIPTION Top 5 Required Skills 1. Knowledge of a HVL methodology like SystemVerilog/UVM. 2. Experience working with various ASIC simulation/formal tools such as VCS, Xcellium/NCsim, Modelsim/Questa, VCFormal, Jaspergold, 0In and others. 3. Protocol know
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$65 - $81










