Job Details

Skills

SystemVerilog
UVM
ASIC Verification
SoC Verification
Chip Level Verification
RTL Verification
ASIC
AXI
Bug Tracking
Cadence
Collaboration
Computer Engineering
DDR SDRAM
Debugging
Digital Design
Electronic Engineering
Emulation
Engineering Design
Ethernet
FPGA
Git
IPS
Integrated Circuit
MIPI
Management
RTL
System On A Chip
Verilog
USB
SVA
Prototyping
Physical Data Model
Scripting

Summary

Design Verification Engineer

Location: Bay Area, CA (Onsite/Hybrid)
Experience: 8+ Years

Job Summary

We are seeking an experienced Design Verification Engineer with strong expertise in ASIC/SoC verification to join our semiconductor team. The ideal candidate will have extensive experience in SystemVerilog, UVM, and protocol verification, with a proven track record of developing robust verification environments and achieving coverage closure.

Key Responsibilities

Develop and execute comprehensive verification plans for ASIC/SoC designs.
Build reusable UVM-based verification environments, testbenches, scoreboards, checkers, and assertions.
Create and execute directed and constrained-random test cases.
Perform functional, code, assertion, and toggle coverage analysis and drive coverage closure.
Debug RTL and simulation issues in collaboration with design teams.
Verify complex IPs and SoCs at block, subsystem, and chip level.
Work closely with RTL designers, architects, and physical design teams throughout the development lifecycle.
Participate in regression execution, bug tracking, and verification sign-off.

Required Skills

8+ years of ASIC/SoC Design Verification experience.
Strong expertise in SystemVerilog and UVM.
Excellent knowledge of Verilog and digital design fundamentals.
Experience with industry-standard simulators such as Synopsys VCS, Cadence Xcelium, or Siemens QuestaSim.
Strong debugging and scripting skills using Python, Perl, Shell, or Tcl.
Experience with assertions (SVA), constrained-random verification, and functional coverage.
Familiarity with version control systems such as Git.

Preferred Experience

Chip-level and SoC verification.
Verification of high-speed bus protocols such as AXI, AHB, APB, PCIe, USB, Ethernet, DDR, MIPI, or UCIe.
Low-power verification using UPF/CPF.
Experience with emulation or FPGA prototyping is a plus.

Education

Bachelor''s or Master''s degree in Electronics Engineering, Computer Engineering, or a related field.

Employment Type: Full-Time

If you are passionate about ASIC verification and have hands-on experience with modern verification methodologies, we''d love to hear from you.

Employers have access to artificial intelligence language tools (“AI”) that help generate and enhance job descriptions and AI may have been used to create this description. The position description has been reviewed for accuracy and Dice believes it to correctly reflect the job opportunity.

Dice Id: 91153480
Position Id: 03-08-2026
Posted 16 hours ago

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Sridevi Kolusu

Recruiter @ Sivaltech

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