Company: Qualcomm Technologies, Inc. Job Area: Engineering Group, Engineering Group > ASICS Engineering General Summary: In this position, you will be responsible for RTL design and verification of digital IPs used across the board in Qualcomm chips. You will have the opportunity to work on critical high-speed clock IPs, power-sequencing blocks integral to Qualcomm's low power designs, custom FIFOs and high-speed latch arrays. The position also involves close collaboration with SOC design and