Company:
Qualcomm Technologies, Inc.
Job Area:
Engineering Group, Engineering Group > ASICS Engineering
General Summary:
As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives communication and data processing transformation to help create a smarter, connected future for all. As a Qualcomm ASIC Engineer, you will define, model, design (digital and/or analog), optimize, verify, validate, implement, and document IP (block/SoC) development for a variety of high performance, high quality, low power world class products. Qualcomm Engineers collaborate with cross-functional groups to determine product execution path.
Minimum Qualifications:
Bachelor's degree in Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience.
OR
Master's degree in Science, Engineering, or related field and 5+ years of ASIC design, verification, validation, integration, or related work experience.
OR
PhD in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.
Candidate will be responsible for developing next generation power and limits system. With HPC, AI, and automotive system become so compute intense, the thermal and electrical constrained performance is becoming the bottleneck. A new system needs to be defined to have maximum performance while meet the thermal and power envelop. A fast DCVS system is also needed to make the transient response of the power delivery system to be able to support high frequency CPU, GPU, and NSP. The candidate will be defining the power and limit system to have optimal system performance while enforce the thermal and electrical limits with minimum SW intervention. This role will require the candidate to understand and work on all aspects of power control and limits architecture, micro architecture and interactions with system, SW and product team.
Skills/Experience
10+ years of strong experience in power and limits system
Familiar with UPF and power domain crossing
Experience in low power design methodology and clock domain crossing designs
Proficient in Perl, Python scripting
Expertise in post-Si debug is a plus
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Pay range and Other Compensation & Benefits:
$174,400.00 - $285,400.00
The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Even more importantly, please note that salary is only one component of total compensation at Qualcomm. We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales-incentive plans are not eligible for our annual bonus). In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play. Your recruiter will be happy to discuss all that Qualcomm has to offer - and you can review more details about our US benefits at this link.
If you would like more information about this role, please contact Qualcomm Careers.
Employers have access to artificial intelligence language tools (“AI”) that help generate and enhance job descriptions and AI may have been used to create this description. The position description has been reviewed for accuracy and Dice believes it to correctly reflect the job opportunity.
- Dice Id: RTX171842
- Position Id: cba7c829f7f7a0afb7f3fb4801afe43f
- Posted 2 days ago
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