San Jose, California
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Today
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Sr. Principal SI/PI Engineer This is a unique opportunity to join the HPP IP R&D Group at Cadence Design Systems. We are looking for a Sr Principal SI/PI Engineer who will be a key contributor to our advanced high speed IP products. This is a hands-on technical position. Main Job Tasks and Responsibilities: Work on test chip package design SI/PI optimization and verification. Work on ev
Full-time
USD 154,000.00 - 286,000.00 per year
