Emulation Engineer

Role: Emulation Engineer

Location: Sunnyvale, CA 

Domain: Embedded AI

Type: FT 

Salary / Pay Rate: around/ within $140K to $200K 

Duration: long-term

Exp. Level: 5 to 15 Yrs. Strong & Genuine candidates will only make it. Quality expectation is high; however, rate flexibility is possible for the right candidate.

Join our dynamic team to play a crucial role in bringing the next generation of complex AI infrastructure silicon System-on-Chip (SoC) designs to life. As an HVA Emulation Verification Engineer, you will be at the forefront of pre-silicon validation, ensuring the highest quality and functionality of our hardware before it goes into production.

Responsibilities

•                  Emulation Environment Development: Build and maintain pre-silicon emulation platforms using industry-standard systems such as Cadence Palladium or Synopsys ZeBu.

•                     Model Integration and Optimization: Integrate the RTL design onto the emulation platform by ensuring synthesizability, optimize build efficiency and performance, and work with high-performance transactors and emulation testbenches (e.g., using SystemVerilog, C/C++, Python).

•                     Flush out emulation flow issues by performing smoke verification

•                     Support validation team in execute comprehensive test content, including bare-metal and OS-based tests, to accelerate bug finding in pre-silicon on the emulation platform.

•                     Collaboration: Work closely with cross-functional teams including design, verification and SW development teams to understand issues in using the emulation platform.

•                     Flow Automation: Develop and enhance automation scripts and flows using Python, Perl, and shell scripting to manage regressions, optimize runtime, and improve overall verification efficiency.

•                     Vendor Collaboration: Interface with emulation platform vendors to debug and quickly resolve technical issues encountered with the tools.

•                     The candidate must be able to work independently and proactively on allocated technical tasks.

Required Qualifications

•                     Education: Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field.

•                     Experience: Proven experience of 5+ years in hardware verification and/or emulation roles.

•                     Emulation Expertise: Hands-on experience with at least one of the major commercial emulation platforms (Cadence Palladium, Synopsys ZeBu, or Siemens Veloce).

Technical Skills:

•                     Proficiency in Hardware Description Languages (HDLs) such as Verilog and SystemVerilog.

•                     SoC Knowledge: Solid understanding of SoC architectures and industry-standard protocols (e.g., AXI, PCIe, ETH, USB, HVM)

•                     Experience with verification methodologies (UVM, SVA) and related verification environments, including C/C++ DPI is desirable.

•                     Strong scripting skills in Python, Perl, Tcl, or Shell for automation.

•                     Familiarity with debugging tools (e.g., Verdi, SimVision) and waveform analysis is desirable.

Soft Skills:

•                     Problem-Solving: Excellent analytical and problem-solving skills with a meticulous attention to detail.

•                     Communication: Strong verbal and written communication skills and the ability to work effectively in a collaborative, team-oriented environment.