Remote
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5d ago
RTL Design Engineer Location: Santa Clara, CA - Hybrid or remote options Interviews: At least two, one on site JOB DUTIES: Responsible for RTL design using Verilog HDL for implementation and debug. Read and comprehend Analog Macro level architectural specification. RTL Candidate Requirements Top 3 skills: Modelling Analog-Mixed signal circuits in RTL, with experience in LDOs, BGs and EMC Ability to run and debug LECC for design Run quality check tool such as Spyglass Lint and fix issues. Abilit
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Contract
$50 - $60