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FE RTL Infrastructure - CAD Engineer

Apple, Inc.

Beaverton, Oregon • Today

Full-time

Lead Electrical CAD Engineer - Data Center Infrastructure

Jabil Circuit Inc

Remote • Today

Full-time

USD 100,100.00 - 180,200.00 per year

Infrastructure Senior Engineer

System One

Remote • 10d ago

Easy Apply

Full-time

$135000

Sr Lead Infrastructure Engineer

Lumen

Remote or Oregon • Today

Full-time

USD 132,232.00 - 176,310.00 per year

Automation Engineer, Infrastructure - Federal Customer

Dell Technologies

Remote or McLean, Virginia • Today

Full-time

Infrastructure Engineer

Roboflow, Inc

Remote or New York, New York • Today

Full-time

USD 180,000.00 per year

Infrastructure Engineer

Algoleap Technologies Inc

Remote • 26d ago

Easy Apply

Contract, Third Party

80 - 85

Infrastructure Engineer

Information Resource Group, Inc.

Remote • Yesterday

Easy Apply

Contract, Third Party

Depends on Experience

Infrastructure Engineer

Onebrief, Inc

Remote • Today

Full-time

USD 180,000.00 - 290,000.00 per year

Job Details

Skills

System On A Chip
Intellectual Property
IP
Perforce
Version Control
Configuration Management
Innovation
Generative Artificial Intelligence (AI)
Artificial Intelligence
Productivity
Management
Training
DV
Integrated Circuit
Python
Perl
Verilog
SystemVerilog
Data Analysis
EDA
RTL
Communication
Debugging
ROOT
Customer Engagement

Summary

Do you love building elegant solutions to highly complex challenges? As part of our Silicon Technologies group, you'll help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC). You'll ensure Apple products and services can seamlessly and efficiently handle the tasks that make them beloved by millions. Joining this group means you'll be responsible for crafting and building the technology that fuels Apple's devices. Together, you and your team will enable our customers to do all the things they love with their devices!

Description

As a Front-End (FE) RTL Infrastructure - CAD Engineer, you will play a major role in developing and supporting a reliable infrastructure and work environments that design and verification teams use for modifying, analyzing, and verifying RTL.

In this role, you will support RTL gatekeeping infrastructure of design and verification collateral as well as soft IP development and release methodologies. Additionally, you will contribute to Perforce administration, ensuring the integrity and performance of our version control ecosystem. You will have the opportunity to maintaining a centralized configuration management system that enables different design views to be loaded into any Front-End flow.

An important key aspect of this position is driving innovation through building generative AI solutions across all of these systems and identifying opportunities where AI can accelerate engineering productivity and improve infrastructure reliability. Your role will also involve managing internal training materials, keeping them up to date and coordinating vendor trainings so that our Designer/DV engineers are well equipped to do their best job at Apple.

The FE RTL Infrastructure - CAD Engineer plays a key role in promoting and driving robust, scalable infrastructure solutions across RTL Design and DV teams within Apple's HWTech organization.

In short, this position focuses in fostering our North Star and making sure that our vision statement extends across the different design groups:

To create, monitor, and maintain high quality infrastructure and flows that enable Apple Silicon to produce chips that enable Apple's best products. You will be working with an energized and highly motivated CAD team that comprehensively supports Apple's chip design efforts.

Minimum Qualifications

Minimum of BS degree

Expertise in programming in Python or Perl

Knowledge in Verilog and SystemVerilog

Preferred Qualifications

Experience with Front-End EDA tools such as Clock Domain Crossing, Reset Domain Crossing or Lint

Understanding of Front-End RTL Build or Construction flows

Excellent communication, debug and root causing skills

Customer-oriented mindset and support experience

Experience in contributing to large-scale software system development from specification to deployment

MSEE/CE/CS preferred

Employers have access to artificial intelligence language tools (“AI”) that help generate and enhance job descriptions and AI may have been used to create this description. The position description has been reviewed for accuracy and Dice believes it to correctly reflect the job opportunity.

Dice Id: 90733111
Position Id: 18ab7aaeab64b9b425fd639591f6429
Posted 30+ days ago

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Portland, Oregon

•

Today

Description Invent the future with us. Ampere is a semiconductor design company for a new era, leading the future of computing with an innovative approach to CPU design focused on high-performance, energy efficient AI compute. As a pioneer in the new frontier of energy efficient high-performance computing, Ampere is part of the Softbank Group of companies driving sustainable computing for AI, Cloud, and edge applications. Join us at Ampere and work alongside a passionate and growing team - we'd

Full-time

USD 225,500.00 - 338,500.00 per year

Digital CAD Flow Developer

Remote

•

14d ago

Job Title: Digital CAD Flow Developer Location: Remote Employment Type: Contract Job SummaryWe are looking for an experienced Digital CAD Flow Developer to develop, enhance, automate, and support RTL-to-GDSII implementation flows for advanced SoC designs. The ideal candidate will have strong experience with Synopsys Reference Methodology (RM) and hands-on expertise in digital implementation flows. You will work closely with design, CAD, physical design, and EDA teams to improve flow efficiency,

Easy Apply

Contract

Depends on Experience

SMTS Verification Engineering

Hillsboro, Oregon

•

Today

Overview Rambus, a premier chip and silicon IP provider, is seeking to hire an exceptional junior / Recent College Graduate Design Verification Engineer to join our DRAM Controller IP team in Hillsboro, Oregon. The successful candidate will participate in pre-silicon RTL Verification activities related to Rambus DRAM controller product line for controller technologies including DDR, LPDDR, HBM, and Graphics/GDDR controller technologies. This is a Full Time position, reporting to the local onsit

Full-time

USD 100,100.00 - 185,900.00 per year

DV CAD Engineer

Remote or California

•

Today

Company: Qualcomm Technologies, Inc. Job Area: Engineering Group, Engineering Group > CPU Engineering General Summary: As a CAD Engineer focusing on the methodology and support of RTL design verification, you will work with architecture, design, software and verification leads to develop technology critical to the development of our products. You will be involved from conception to final creation and every step along the way. Roles and Responsibilities Work with chip leads to understand the

Full-time

USD 186,700.00 - 280,100.00 per year