
Saicon Consultants Inc.
Ben Lomond, California • Today
Easy Apply
Contract, Third Party
Depends on Experience
327 results (13 new)

Saicon Consultants Inc.
Ben Lomond, California • Today
Easy Apply
Contract, Third Party
Depends on Experience















Samsung Electronics America
San Jose, California • Today
Full-time
USD 138,000.00 - 206,000.00 per year







Samsung Electronics America
San Jose, California • Today
Full-time
USD 138,000.00 - 206,000.00 per year






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Ben Lomond, California
•
Today
Duration: 6 months contract The Role: This is a Physical Design Engineering role that will require taking the design from RTL to GDS with synthesis, Place n Route, timing, and Physical Verification.The Person:Strong communication skills, ability to multi-task across projects, and work with geographically spread-out teams.Responsibilities;This engineer will work on high-speed multi-gigabit SerDes PHY designs.This includes automated synthesis and timing driven place and route of RTL blocks for hi
Easy Apply
Contract
$65 - $75
Santa Clara, California
•
Today
Job description: Manage the complete custom layout process for SRAM bitcell arrays, memory periphery, test structures, and memory macros in advanced CMOS technologies. Develop and improve floorplans for SRAM and memory blocks, covering array layout, periphery positioning, power grid design, routing channels, and macro assembly. Carry out, debug, and complete DRC, LVS, ERC, antenna, and associated physical verification checks with tools such as Calibre, ICV, or similar workflows. Support
Easy Apply
Third Party, Contract
$112 - $112
Santa Clara, California
•
Yesterday
DFX/DFT Engineer Location : Bay area CA Experience :- 6 to 8 yrs Onsite 6-12 months JD:- We are looking for a highly motivated DFX Engineer to develop, implement, verify, and validate advanced Design-for-Test (DFT/DFX) solutions for complex SoCs and ASICs. The candidate will work closely with Architecture, Design, Verification, Physical Design, and Post-Silicon teams to ensure robust manufacturability, testability, and silicon quality. Key Responsibilities Create and execute test plans for DF
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Contract
Depends on Experience
San Jose, California
•
Yesterday
Client: Etched Design Verification Engineer 6 Openings Location: San Jose, CA & Austin, TX - onsite Please find the JD: Job Summary We are seeking a Design Verification Engineer to join our Interface IP DV team. You will work with architects, designers, and vendors to ensure that all our architecture requirements are met in the IP subsystems and interfaces being created, validate correctness and performance across the full hardware-software stack. This role demands creativity, deep technical ab
Easy Apply
Full-time, Third Party
Depends on Experience