Company:
Qualcomm Technologies, Inc.
Job Area:
Engineering Group, Engineering Group > Analog Mixed Signal Design
General Summary:
Job Description
Oversees definition, design, verification, and documentation for development of a variety of CMOS mixed analog/digital blocks such as: data converters, PLLs, analog/digital filters, low drop out linear voltage regulators, Buck/Boost switching regulators, charge pumps, precision references, sensor signal acquisition circuit, audio amplifiers. Determines architecture design and circuit specifications based on system level requirements. Is actively involved in all aspects of the design from system definition/simulation to circuit design and simulation. Heavy involvement in overseeing layout and silicon evaluation is also expected. Uses design tools such as Cadence ADE, MathWorks MATLAB and others. Provides technical expertise for new initiatives (e.g. analog design automation).
Required for this Role:
Bachelor's Degree in Electrical Engineering with 5+ years of experience with analog or mixed-signal integrated circuit design in BCD and nanometer planar CMOS or FinFET and 4+ years of Mixed-Signal IC design, verification, or related work experience.
OR
Master's degree in Electrical Engineering or related field and 3+ years of Mixed-Signal IC design, verification, or related work experience.
OR
PhD in Electrical Engineering or related field in Mixed-Signal IC design, verification, or related work experience.
3+ years of experience using one or more design tools (e.g., CADENCE, SPICE, MATLAB, and/or Verilog/VHDL).
Preferred Qualifications:
PhD in Electrical Engineering or related field.
Experience in analog/mixed-signal integrated CMOS circuit design for a specific area (e.g., VCO, PLL, and DLL design, Audio CODEC and Class D Audio amplifier design, data converters, high dynamic range linear amplifiers, high output power Buck/Boost switching regulators, charge pumps).
1+ year of work experience in a role requiring interaction with senior leadership (e.g., Director and above).
Principal Duties and Responsibilities:
Uses advanced tools or databases to build and improve on architecture and circuit designs for multiple blocks; contributes to design reviews and provides feedback to others.
Works with layout teams to oversee block-level layout of multiple blocks.
Defines verification plan for portion of IP or chip and runs complex simulations and analyses (e.g., power, performance) on designs; documents and utilizes results to improve and verify designs and achieve power, performance, and functionality targets.
Designs, programs, and runs complex tests and reviews test results of bench/ATE data; ensures bugs and other issues are identified and appropriately analyzed.
Consults with internal or external users and third-party vendors to guide implementation and ensure alignment with their needs and goals.
Builds deep understanding of one's domain and understands several other domains to anticipate how all components will integrate in the broader framework. Writes clear and detailed technical documentation and design descriptions for complex projects to guide users and/or customers.
Contributes to conversations to generate new ideas for new initiatives; provides recommendations for new directions to explore.
Level of Responsibility:
Working independently with little supervision.
Providing some supervision/guidance to others.
Making decisions that are moderate in impact; errors may have relatively minor financial impact or effect on projects, operations, or customer relationships; errors may require involvement beyond immediate work group to correct.
Using verbal and written communication skills to convey information that may be somewhat complex to others who may have limited knowledge of the subject in question; may require basic negotiation and influence, cooperation, tact, and diplomacy, etc.
Completing tasks that do not have defined steps; simultaneous use of multiple mental abilities is generally required to determine the best approach; mistakes may result in significant rework.
Exercising creativity to draft original documents, imagery, or work products within established guidelines.
Using deductive and inductive problem solving; multiple approaches may be taken/necessary to solve the problem; often information is missing or incomplete; intermediate data analysis/interpretation skills may be required.
Minimum Qualifications:
Bachelor's Degree in Electrical Engineering with 2+ years of experience with analog or mixed-signal integrated circuit design in nanometer planar CMOS or FinFET and 4+ years of ASIC design, verification, or related work experience.
OR
Master's degree in Electrical Engineering or related field and 4+ years of ASIC design, verification, or related work experience.
OR
PhD in Electrical Engineering or related field and 2+ of years ASIC design, verification, or related work experience.
2+ years of experience using one or more design tools (e.g., CADENCE, SPICE, MATLAB, and/or Verilog/VHDL).
Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries).
To all Staffing and Recruiting Agencies: Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications.
EEO Employer: Qualcomm is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification.
Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.
Pay range and Other Compensation & Benefits:
$145,600.00 - $218,400.00
The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Even more importantly, please note that salary is only one component of total compensation at Qualcomm. We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales-incentive plans are not eligible for our annual bonus). In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play. Your recruiter will be happy to discuss all that Qualcomm has to offer - and you can review more details about our US benefits at this link.
If you would like more information about this role, please contact Qualcomm Careers.
Employers have access to artificial intelligence language tools (“AI”) that help generate and enhance job descriptions and AI may have been used to create this description. The position description has been reviewed for accuracy and Dice believes it to correctly reflect the job opportunity.
- Dice Id: RTX171842
- Position Id: 6f59ea02bc5a26a96f6a1e162e0bd6dc
- Posted 15 hours ago
