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San Jose, California

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Today

Please Note: 1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account) 2. If you already have a Candidate Account, please Sign-In before you apply. Job Description: Broadcom's CSG division is seeking candidates for a Staff DFT engineer position. The successful candidate will be responsible for developing and implementing DFx (Design for Test/debug & manufacturability) solutions for Digital, mixed signal IPs. Candi

Full-time

USD 120,000.00 - 192,000.00 per year

DFT Engineer

San Jose, California

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Today

Please Note: 1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account) 2. If you already have a Candidate Account, please Sign-In before you apply. Job Description: Broadcom's CSG division is seeking candidate for a DFT lead position. The successful candidate will be responsible for leading most complex and cutting edge network switching ASIC DFx (Design for Test/debug & manufacturability) from DFT architecture, t

Full-time

USD 120,000.00 - 192,000.00 per year

ASIC/SOC DFT Engineer (Silicon Engineering)

Sunnyvale, California

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Today

SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars. ASIC/SOC DFT ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience in building rockets and spacecraft to deploy Starlink, the world's most advanced broadband internet system. Starlink is the world's

Full-time

USD 130,000.00 - 155,000.00 per year

CPU DFT Engineer

Santa Clara, California

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Today

Company: Qualcomm Technologies, Inc. Job Area: Engineering Group, Engineering Group > CPU Engineering General Summary: As a DFT Engineer you will work with chip architects, chip designers, implementation engineers and test engineers to verify the DFT and DFD (Design for Debug) architecture, implementation, and test plans for both mixed signal and digital VLSI designs. Then you'll insure it becomes reality. We're doing a ground up implementation of a new chip architecture, so you'll have to ab

Full-time

USD 142,200.00 - 213,400.00 per year

Sr. SOC/ASIC DFT Engineer (Silicon Engineering)

Sunnyvale, California

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Today

SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars. SR. SOC/ASIC DFT ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience in building rockets and spacecraft to deploy Starlink, the world's most advanced broadband internet system. Starlink is the worl

Full-time

USD 170,000.00 - 230,000.00 per year

HBM/DDR/SERDES DFT Verification Lead Engineer

San Jose, California

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Today

Please Note: 1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account) 2. If you already have a Candidate Account, please Sign-In before you apply. Job Description: Broadcom's ASIC Product Division is seeking candidates for HBM/DDR/SERDES Verification Lead Engineer position at our San Jose, California Development Center. We are seeking a highly skilled HBM and SerDes DFT Verification Engineer to join our dynamic t

Full-time

USD 141,300.00 - 226,000.00 per year

Senior DFT Methodology Engineer

Santa Clara, California

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Today

NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI - the next era of computing. NVIDIA is a "learning machine" that constantly evolves by adapting to new opportunities that are hard to solve, that only we can tackle, and that matter to the world. This is our life's work , to amplify huma

Full-time

USD 136,000.00 per year

DFT Engineer

Santa Clara, California

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Today

Implementation DFT structure, including Tessent EDT scan chains, Memory BIST and Logic BIST to ensure high test coverage and low test time Generate Scan and MBIST test patterns using ATPG tools Collaborate with the design team to ensure integration of DFT features Conduct gate-level simulation(GLS) with timing annotation and power and ground connection. Debug simulation failure with waveform viewer In-depth knowledge of MBIST algorithm Strong understanding of SOC power structure and low power de

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Contract, Third Party

DFT Lead opportunity to work for a Hardware company focused on accelerating training and inference performance for large AI models

Saratoga, California

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21d ago

DFT Lead Full Time Opportunity in Saratoga, CA Responsibilities Define the DFT architecture of a multi-chip system SOC. involving all aspects of test design functions such as Scan, BIST, Memory Repair, BSD ( ACJTAG/DCJTAG). Proficiency in Synthesis design constraints. ( Ie SDC) Prior experience with Serializers/Deserilizers. Sound Proficiency in either Mentor /Synopsys Test Tools required. Proficiency is synthesis, Define and implement OCC. Exposure to advanced DFT techniques like LBIST and str

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Full-time

Depends on Experience

Senior DFT Engineer

Santa Clara, California

•

Today

Full-time

USD 136,000.00 per year

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