Search Jobs | Dice.com

Sunnyvale, California

•

Today

Only Local independent candidates are allowed to apply for this Role. Location: Sunnyvale, CA | Austin, TX Experience: 10+ years Brief: Lead RTL-to-GDSII implementation for high-performance SoCs on 3nm/5nm nodes. Focus on PnR, timing closure, and power integrity. Core Tech Stack: Tools: Cadence Innovus or Synopsys ICC2/Fusion Compiler. Sign-off: PrimeTime (STA), RedHawk/Voltus (Power), Calibre (PV). Scripting: Python, Tcl, or Perl. Requirements: Proven track record with FinFET (5nm or below). E

Easy Apply

Full-time, Third Party

Depends on Experience

Hiring Physical Design Engineer in California

Santa Clara, California

•

Today

Hi, Job Title: Physical Design Engineer Location: Cupertino, CA Work Mode: 100% Onsite (5 Days/Week) Experience: 5 15Years Job Description We are actively hiring experienced Physical Design Engineers for a leading semiconductor client in Cupertino, CA. Candidates should possess strong expertise in end-to-end physical implementation and signoff flows for advanced node SoC designs. Responsibilities Execute complete physical design implementation flow including Floorplanning, Power Planning, Pla

Easy Apply

Full-time, Contract, Third Party

ASIC Physical Design Engineer

San Jose, California

•

5d ago

Candidates must be currently authorized to work in the United States on a full-time, permanent basis. StaffRight Associates and our clients do not provide visa sponsorship for this position. PLEASE DO NOT APPLY IF YOU DO NOT MEET THESE ABOVE QUALIFICATIONS Great base pay, bonus, terrific benefits and exceptional 401k! he MissionStaffRight Associates is recruiting to identify a high-caliber ASICPhysical Design Engineer to spearhead the structural realization of next-generation System-on-Chip (So

Easy Apply

Full-time

170000 - 220000

Physical Design Engineer :: San Jose, CA (onsite) :: Long Term Contact

San Jose, California

•

Today

Physical Design Engineer San Jose, CA (onsite) Long Term Contact Strong experience in RTL synthesis using Cadence GenFusion compiler, including SDC constraint development and QoR optimization (timing, area, power) Hands-on expertise in Static Timing Analysis using Tempus, including setup/hold closure, C scenarios, OCV, and timing signoff concepts Ability to analyze and debug timing violations across synthesis and floorplan stages and drive closure Experience in block-level floorplanning using Ca

Easy Apply

Third Party, Contract

Senior Staff GPU Physical Design Engineer

Remote

•

Today

Job Description Title: Senior Staff GPU Physical Design Engineer Location: Austin, TX or San Jose, CA. onsite strongly preferred Need: GPU or high-performance SoC experience. Advanced node (?5nm). Full block ownership Position Summary We are seeking a Senior Staff GPU Physical Design Engineer for our client to work on the physical implementation of high-performance GPU and system-level IP, driving execution across synthesis, place-and-route, timing closure, and signoff for their advanced tech

Contract

Senior Physical Design Signoff Engineer

San Jose, California

•

Today

Job Title: Senior Physical Design Signoff Engineer (Top-Level SoC) Location: SanJose CA Contract Experience: 8+ Years Job Summary We are hiring experienced Physical Design Signoff Engineers for advanced-node SoC projects (7nm/5nm/3nm). Candidates should have strong expertise in full-chip signoff with multiple successful tapeouts and the ability to drive signoff-to-tapeout closure independently. Key Responsibilities Lead top-level signoff activities for high-performance SoCs.Collaborate with RTL

Easy Apply

Contract

Depends on Experience

AI/Physical Design Engineer

Santa Clara, California

•

Today

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the wo

Full-time

USD 103,600.00 per year

SoC Physical Design Engineer, Electrical Analysis

San Jose, California

•

Today

Imagine what you could do here! At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, hardworking people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also applies to our pr

Full-time

Design Engineer III - RTL-to-GDSII

Sunnyvale, California

•

Today

Job Title: Design Engineer - RTL-to-GDSII Location: Dallas, TX or Sunnyvale, CA Duration: Contract - 11 months Pay Range: $75/hr $81/hr (W2) Job ID: 373412 About BCforward BCforward is a leading global IT consulting and workforce solutions firm providing services and support to Fortune 500 and government clients. Founded in 1998, BCforward has grown with our customers needs into a full-service business solutions provider. With delivery centers and offices across North America and India, we

Easy Apply

Contract

Compensation information provided in the description

Design Engineer 3

Newark, California

•

12d ago

Request ID: 5561-1 Start/End Dates: 28/01/2026 - 29/01/2027 Tax Work Location: Newark CA - Onsite Job Title: Engineering & IT - Design Engineer 3 Summary: The main function of a Design Engineer is to research and investigate the design, functionality and maintenance of mechanical products, equipment, systems and processes. A typical design engineer has the ability to make engineering drawings and read and interpret blueprints. Job Responsibilities: Research, design, develop, manufacture, and t

Easy Apply

Contract, Third Party

Depends on Experience

Design & Validation Test Engineer

Newark, California

•

13d ago

Maxonic maintains a close and long-term relationship with our direct client. In support of their needs, we are looking for a Design & Validation Test Engineer. Job Description: Job Title: Design & Validation Test Engineer Job Type: Contract Job Location: Newark, CA Work Schedule: On-site Pay Rate: $51, Based on experience Description: We are looking for a Design & Validation Test Engineer to support electrical and environmental validation testing of automotive electronic control units (ECUs) and

Easy Apply

Contract

Depends on Experience

Sr. Full Chip Physical Verification Engineer (Silicon Engineering)

Sunnyvale, California

•

Today

SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars. SR. FULL CHIP PHYSICAL VERIFICATION ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience in building rockets and spacecraft to deploy Starlink, the world's most advanced broadband internet system.

Full-time

USD 170,000.00 - 230,000.00 per year

Design Engineer 4 - 6789-1

Newark, California

•

6d ago

Request ID: 6789-1 Start/End Dates: 25/05/2026 - 31/12/2026 Sourcing / Candidate Location: USCA_Lucid_1 (SJC01) Job Title: Engineering & IT - Design Engineer 4 Candidate Location Requirements: Newark, California, Engineer, Exterior Trim We are currently seeking an Exterior Trim Engineer. This position requires a responsibility for designing and developing parts of the exterior systems of a world class vehicle in terms of both styling and function. Our ideal candidate exhibits a can-do attitude

Easy Apply

Contract, Third Party

$60

Design Verification Engineer - Ethernet

Santa Clara, California

•

Today

Design Verification Engineer Overview Upscale AI is developing next-generation Ethernet networking infrastructure optimized for large-scale AI and GPU cluster environments. We are seeking experienced Design Verification Engineers with strong networking and ASIC verification backgrounds to help validate high-performance networking silicon and AI fabric technologies. ResponsibilitiesDevelop and execute verification plans for networking ASICs and SoC designsBuild and maintain SystemVerilog/UVM-base

Easy Apply

Full-time

USD180000 - USD300000 per annum, Benefits: $180k-$300k Annual Salary

Design Engineer- Physical Security

Remote

•

Today

Job:Design Engineer- Physical Security Location: 100% remote from anywhere in the US Duration: multi-yearcontract position Job Summary:We are seeking a highly skilled and experiencedPhysical Security Design Engineer to join our team. The ideal candidate will be responsible for the end-to-end design, optimization, and implementation of complexCCTV and Access Control systems. Key Responsibilities Design security systems, includingAccess Control (Client),Video Surveillance (SVS/CCTV), intrusion de

Easy Apply

Contract

Depends on Experience

High speed Board Design Engineer

San Jose, California

•

22d ago

Immediate need for a talented High speed Board Design Engineer .This is a 06-12+ months contract opportunity with long-term potential and is location in San Jose, CA/ Sunnyvale, CA(Onsite). Please review the job description below and contact me ASAP if you are interested. Job Diva ID: 26-12621 Pay Range: $ 45 - $50/hour. Employee benefits include, but are not limited to, health insurance (medical, dental, vision), 401(k) plan, and paid sick leave (depending on work location). Key Responsibili

Easy Apply

Contract

$45 - $50

Design Verification Engineer- DDR/LPDDR5

San Jose, California

•

28d ago

Required Background: BS in Computer Science/EE with 10+ years of experience or MS in computer science/EE with 8+ years of experience in SoC design verification.Experience with block level, cluster level or chip/SoC level verification.Proficiency in system verilog, UVM, constrained random and coverage driven verification methodology.DDR controller and/or DDR-IO verification experience is a must.Very good understanding of LPDDR JDEC specifications preferably for LPDDR5.Good understanding of DDR co

Easy Apply

Full-time

Depends on Experience

Integration RTL Design Engineer

San Jose, California

•

Today

Full-time

USD 145,600.00 per year

Product Design Engineer - Apple Vision Pro

San Jose, California

•

Today

Apple is where individual imaginations gather together, committing to the values that lead to great work. Every new product we build, service we create, or Apple Store experience we deliver is the result of us making each other's ideas stronger. That happens because every one of us shares a belief that we can make something wonderful and share it with the world, changing lives for the better. It's the diversity of our people and their thinking that inspires the innovation that runs through every

Full-time

Product Design Engineer - Battery Cell

Cupertino, California

•

Today

Do you have a passion for invention and self-challenge? Do you thrive on pushing the limits of what's considered feasible? As part of our Battery Engineering group, you'll help craft creative battery solutions that deliver more energy in smaller spaces than ever before! You'll work across subject areas to transform improved hardware elements into a single, integrated design. Join us, and you'll help us innovate new battery technologies that continually outperform the previous iterations. By coll

Full-time

Filter Results

Job post features

Posted date

Work settings

Employment type

Distance

Employer type

Work authorization