Design Verification Engineer Jobs in California

Refine Results
1 - 20 of 4,729 Jobs

Design Verification Engineer

EITAcies, Inc.

Santa Clara, California, USA

Full-time, Part-time, Third Party, Contract

This position is for a Sr. Failure Analysis Engineer. (On-Site 5 days/week) Primary Tasks: Drive returned product Failure Analysis, characterizing failures, and escalating issues and trends to the Hardware Quality Engineering team Resolve escalated RMA's by determining the hardware root cause of the failure issue. Track and report on RMA failure trends by product and cause to the Tech Op's team. Track the progress of all in-progress RMA's requiring FA and prioritizing accordingly. Monitor proce

Design Verification engineer

Viva Tech Solutions

Folsom, California, USA

Full-time

Title: Design Verification engineer Type: FTE Location: Folsom CA Onsite- Day 1 onwards Key Responsibilities: Domain: VLSI /Semiconductor Mandate skill- Verification OVM UVMUtilize hands-on experience in SystemVerilog, UVM, and Testbench development to facilitate the verification process.Perform thorough debugging and troubleshooting to identify and resolve issues efficiently.Conduct full-chip and SoC simulations to validate design functionality and performance.Demonstrate expertise in subsyst

Design Verification Engineer

HR Pundits

Folsom, California, USA

Full-time

Job title: Design Verification Engineer Location: Folsom, CA (Onsite from day 1) Position: Fulltime Job Description: Utilize hands-on experience in SystemVerilog, UVM, and Testbench development to facilitate the verification process. Perform thorough debugging and troubleshooting to identify and resolve issues efficiently. Conduct full-chip and SoC simulations to validate design functionality and performance. Demonstrate expertise in subsystem verification, encompassing controllers and PHY compo

Senior Design Verification Engineer

Microsoft Corporation

Mountain View, California, USA

Full-time

Microsoft is a highly innovative company that collaborates across disciplines to produce cutting-edge technology that changes our world. Microsoft's Silicon team builds custom silicon for a diverse set of systems ranging from innovative consumer products like Xbox to high-performance Azure cloud servers, clients, and augmented reality. We are looking for a Senior Design Verification Engineer to work on leading-edge Intellectual Property (IP) development as part of the Semi-Custom and Central Int

Design Verification Engineer

Mirafra Inc

San Jose, California, USA

Full-time

Role: Design Verification Engineer Location: San Jose CA Job Description: Architect block and full-chip verification environments using HVLs and constrained random techniques for SOCs with embedded CPUs and mixed signal interfaces. Requires UVM, System Verilog, SVA Develop test plans and coverage metrics from specifications and write block and chip-level tests in C,SV,UVM Debug RTL and Gate simulations and work with design engineers to verify fixes. Write diagnostics for validation of FPGA p

Design Verification Engineer

LTIMindtree

Mountain View, California, USA

Full-time

About Us LTIMindtree is a global technology consulting and digital solutions company that enables enterprises across industries to reimagine business models, accelerate innovation, and maximize growth by harnessing digital technologies. As a digital transformation partner to more than 700+ clients, LTIMindtree brings extensive domain and technology expertise to help drive superior competitive differentiation, customer experiences, and business outcomes in a converging world. Powered by nearly 90

FPGA Design and Verification Engineer

R Cube Creative Consulting Inc

San Jose, California, USA

Contract

We are seeking an experienced FPGA Design and Verification Engineer to join our team. The ideal candidate will have a strong background in digital logic design, timing closure, and the verification/validation of complex systems. This role involves working with cutting-edge FPGA technologies and collaborating with cross-functional teams to develop high-performance hardware solutions. Key Responsibilities: Digital Logic Design and Verification: Design and verify digital circuits using Verilog, Sys

Principal ASIC Design Verification Engineer

Micron Technology, Inc.

San Jose, California, USA

Full-time

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Responsible for HOST interface (NVMe) test-bench and tests development for Micron next generation SSD controller. Responsible for Micron top-tier NVMe sub-system verification. Develop test-plans,

Design Verification Engineer - Neural Engine

Apple, Inc.

Cupertino, California, USA

Full-time

Summary At Apple, our new ideas have a way of becoming phenomenal products, services, and customer experiences very quickly! As part of a highly hardworking team you will be at the heart of developing the next generation of Apple's Neural Engine. You will be collaborating with all subject areas with critical impact in getting top quality products to millions of customers. We bring passion and dedication to our job and when you are a part of our team there's no telling what you could accomplish.

Design Verification Engineer - Neural Engine

Apple, Inc.

Cupertino, California, USA

Full-time

Summary At Apple, our new ideas have a way of becoming phenomenal products, services, and customer experiences very quickly! As part of a highly hardworking team you will be at the heart of developing the next generation of Apple's Neural Engine. You will be collaborating with all subject areas with critical impact in getting top quality products to millions of customers. We bring passion and dedication to our job and when you are a part of our team there's no telling what you could accomplish.

Design Verification Engineer (GPU)

Xoriant Corporation

San Jose, California, USA

Contract

Design Verification Engineer (GPU) - Local to market in San Jose - Hybrid onsite 3 days per week Role and Responsibilities: Work with architects and designers to build verification environments and test plansAnalyze failing tests to root cause along, working with RTL and reference modeling teamsProvide input on Architectural and Micro-Architectural specifications for testability and accuracyExamine code coverage results, identifying exclusions and improving stimulusMinimum requirements: - Know

GPU Design Verification Engineer, Staff

Qualcomm Technologies

Santa Clara, California, USA

Full-time

Company:Qualcomm Technologies, Inc. Job Area:Engineering Group, Engineering Group > GPU ASICS Engineering General Summary: Architects, designs, implements, verifies, and optimizes performance and power of GPU cores. Responsible for verification of Graphics IP , and performing pre- and post-silicon verification to verify correctness and ensure performance and power goals are met. The responsibilities of this role include: Owning and executing on key independent tasks towards program requireme

ASIC Design Verification Engineer (Santa Clara, CA)

Qualcomm Technologies

Santa Clara, California, USA

Full-time

Company:Qualcomm Technologies, Inc. Job Area:Engineering Group, Engineering Group > ASICS Engineering General Summary: Qualcomm is a company of inventors that unlocked 5G ushering in an age of rapid acceleration in connectivity and new possibilities that will transform industries, create jobs, and enrich lives. But this is just the beginning. It takes inventive minds with diverse skills, backgrounds, and cultures to transform 5Gs potential into world-changing technologies and products. This i

SW Design engineer for Software integration and Verification Testing

Violet Ink

Alameda, California, USA

Contract

We need engineers who have experience in design & development and testing. But this job does not include any design/development. Understand the design developed in C language for micro-controller based on Non-RTOS and RTOS environment for a highly safety critical handheld medical device. Understand the GUI design developed in C++ language for micro-controller based RTOS environment for a highly safety critical handheld medical device. Perform Requirement analysis and identify gaps. Identify t

Verification Hardware Design Engineer

Sedaa

San Jose, California, USA

Contract

Job title -HardwareEngineeringFailure Analysis Location - San Jose, CA (onsite) The position requires the candidate to have had HW design experience so that they can troubleshoot issues effectively to identify the root cause. It is different from a purely validation role which involves running the design through a set of pre-determined tests for compliance. Candidate will be working in Client's Lab, participation and contribution in all phases of hardware diagnostics development, from design in

Silicon Verification Engineer

Randstad Digital

Mountain View, California, USA

Contract

job summary: Define, document, and implement a UVM verification environment including agents and scoreboards Write test plans and implement them by developing tests, test generators, test benches, checkers, coverage, and other verification collateral Run tests on RTL and Gate Level Netlists, debug failures to root cause, and recommend fixes Support post-silicon verification activities of the products working with design and product teams location: Mountain View, California job type: Contract s

Hardware Design Engineer

Randstad Digital

Mountain View, California, USA

Contract

job summary: We are seeking a highly skilled Python Developer with a deep understanding of Design for Testability (DFT) concepts and tools to join our dynamic team as a contractor. The ideal candidate will be proficient in Python programming, possess strong knowledge of DFT methodologies, and have experience with essential tools such as IJTAG, Open OCD, visualization libraries, and data parsing techniques. While experience in post-silicon or hardware development is optional, it would be a valua

Controls Design Engineer ( waiting for feedback on subs)

Ledgent Technology

Pleasanton, California, USA

Full-time

Job Title: Controls Design Engineer ll Location: Pleasanton, CA Direct Hire JOB SUMMARY The position requires the individual to apply their technical knowledge and any prior experience to produce controls project design, material selection, and development of sequence of operation for lower to mid-level projects. Responsible for producing closeout documents at the completion of each project. Proficient level of computer skills and understanding of computer-operated systems and engineering des

RTL ASIC Design Engineer

Innova Solutions, Inc

Mountain View, California, USA

Full-time

Innova Solutions is immediately hiring an RTL ASIC Design Engineer Position type: Full Time Duration: Full Time Location: Mountain View, CA (Onsite) As an RTL ASIC Design Engineer, you will: Minimum Qualifications: RTL ASIC Design lead with some storage backgroundExp with Logic design /micro-architecture / RTL coding is a must.Expertise in Verilog & System Verilog is a must.Experience in Synthesis / Understanding of timing concepts for ASIC is required.Experience in design of DDR / USB /SATA/ PC

Physical Design STA Engineer

Xoriant Corporation

San Jose, California, USA

Contract

Hi, This is Himanshu from Xoriant, sharing the below job description for one of our open requirements, please have a look and let me know your valuable feedback along with your updated resume and best time to reach you. Job Position: Physical Design STA Engineer Job Location: San Jose, CA (Hybrid) Job Duration: 6+ Months Contract Job Description: Sr. STA Engineer with15+ years experience for STA position (Physical Design Static Timing Analysis / STA Engineer).Perform static timing analysis (ST