GPU Formal Design Verification - Mirafra Inc - San Jose, CA, US | Dice.com

Formal Design verification Lead Engineer

Sunnyvale, California

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29d ago

Job Title: Formal DV Lead Engineer Location: Sunnyvale, CA Mode of hiring: Fulltime Design verification, Formal DV, Jasper, Formality, SV/UVM, SoC, IP, Code coverage, Functional Coverages Job Description & Skill Requirement: As a formal verification engineer working the complete formal verification for single or multiple design blocks and IP's (CPU, Connectivity IP, Audio and Image Processing IP, Neural Networks IP, Memory/DMA Controller, Security IP, Peripheral IP, Interconnects, Power managem

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$180,000 - $250,000

Senior Formal Verification Engineer

Remote or Santa Clara, California

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Today

NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It's a unique legacy of innovation that's fueled by great technology-and amazing people. Today, we're tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what's never been done before takes vision, innovation, and the world's best talent.

Full-time

USD 168,000.00 per year

Formal Verification Engineer - New College Grad 2026

Santa Clara, California

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Today

As a Formal Verification Engineer at NVIDIA, you will work in the formal verification team for the industry's leading chips. We are looking for outstanding candidates with knowledge of formal methods. The engineer will own the task of formal verification of RTL units for next generation chip designs. This will involve the candidate having deep knowledge of architectural as well as micro-architectural details of the unit. Ideal candidate must have strong analytical skills, computer architecture b

Full-time

USD 108,000.00 per year

AI/ML Design Verification Methodology Lead Engineer

Santa Clara, California

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Today

Company: Qualcomm Atheros, Inc. Job Area: Engineering Group, Engineering Group > ASICS Engineering General Summary: As a AI/ML Design Verification Methodology Lead, will involve in developing and implementing verification strategies, methodologies, and environments to ensure the functionality, performance, and robustness of variety of Qualcomm WIFI, connectivity and IOT devices architectures. The successful candidate will also lead a team of verification engineers and collaborate closely with

Full-time

USD 176,300.00 - 264,500.00 per year

GPU Formal Design Verification

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