VC jobs in California, USA

BSEE, Computer Engineering, or Computer Science bachelor s degree and a minimum of 3+ years of experience o Masters or Ph.D. degree preferred Good understanding of CPU and/or GPU design architecture Strong experience or exposure to System Verilog (SV) and System Verilog Assertion (SVA) coding skills is required Experience in developing formal verification setups is a must Experience in developing constrained random testbenches is preferred Experience with formal verification tools such as VC For