Own post-silicon structural test pattern debug and regeneration, including ATPG, MBIST, Boundary Scan, and related DFT flows Analyze pattern failures on silicon and drive corrective actions in collaboration with tester teams Utilize Siemens DFT/ATPG tools to modify, validate, and re-release production-ready test patterns Correlate tester results with design intent to isolate coverage gaps and failure mechanisms Drive closure of post-silicon DFT issues to improve yield and test robustness