DFT Engineer

Job Title: DFT Engineer Location: Santa Clara, CA Work Arrangement: Onsite Experience: 5+ Years JOB DESCRIPTION We are seeking an experienced DFT Engineer to join a cutting-edge Silicon Engineering team working on next-generation GPU and AI products. The ideal candidate will have strong expertise in Design for Test (DFT) architecture, scan, MBIST, LBIST, JTAG, ATPG, and silicon debug. This is an excellent opportunity for a hands-on DFT Engineer to contribute to complex ASIC/SoC designs and next-

Benefits: Day-1 Onsite Competitive salary Opportunity for advancement DFT Engineer (Design for Test) Location: Santa Clara, CA (Onsite) Employment Type: Long-Term Contract Interview Process: Virtual Interviews Compensation: Based on Experience (DOE) Engagement: ANY Preference: Local candidates or those able to work onsite We are seeking an experienced DFT Engineer to join a high-performing ASIC/SoC engineering team. In this role, you will be responsible for designing and implementing De

Position Title: DFT Engineers Location: Santa Clara, CA Remote/Onsite: Onsite Types of Hire: Fulltime Job Description: - Familiarity with the Siemens suite of DFT tools DFT insertion for SCAN (with SSN) and MBIST MBIST Repair Implementation and Verification Generating collaterals for Test Timing and Place and Route Expertise in IJTAG 1687 standard and good at understanding ICL and PDL standard Spec Verification of DFT features including Boundary Scan JTAG SCAN MBIST High Speed IO

DFT Engineer Scan / ATPG / MBISTLocation: Santa Clara, CA (Bay Area) Position: DFT Engineer Work Arrangement: Onsite/Hybrid as per project requirements Job SummaryWe are seeking a skilled Design for Test (DFT) Engineer to join our semiconductor engineering team in Santa Clara, California. The ideal candidate will have hands-on experience with DFT methodologies, with strong knowledge of Scan, ATPG, and MBIST. The candidate will be responsible for implementing, validating, and debugging DFT solut