DFT Engineer

Lansing, MI, US • Posted 4 days ago • Updated 1 hour ago
Full Time
On-site
Compensation information provided in the description
Fitment

Dice Job Match Score™

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Job Details

Skills

  • Engineering Design
  • Design Of Experiments
  • Manufacturing
  • Testing
  • Collaboration
  • Physical Data Model
  • Product Engineering
  • Data Compression
  • MBIST
  • ATPG
  • JTAG
  • Synopsys
  • Siemens
  • Cadence
  • Verilog
  • SystemVerilog
  • Scripting
  • Python
  • Perl
  • Tcl
  • Shell
  • ASIC
  • System On A Chip
  • Debugging
  • Problem Solving
  • Conflict Resolution
  • DFT
  • Semiconductors
  • Effective Communication
  • Agile

Summary

Benefits:
  • Day-1 Onsite
  • Competitive salary
  • Opportunity for advancement

DFT Engineer (Design for Test)

Location: Santa Clara, CA (Onsite)

Employment Type: Long-Term Contract

Interview Process: Virtual Interviews

Compensation: Based on Experience (DOE)

Engagement: ANY

Preference: Local candidates or those able to work onsite

We are seeking an experienced DFT Engineer to join a high-performing ASIC/SoC engineering team.

In this role, you will be responsible for designing and implementing Design-for-Test (DFT) solutions that ensure high manufacturing quality, test coverage, and efficient production testing for complex semiconductor devices.

Key Responsibilities
  • Design and implement DFT architecture for ASIC and SoC designs.
  • Develop and integrate Scan Compression, MBIST, LBIST, JTAG, and IJTAG solutions.
  • Perform ATPG, fault simulation, and test coverage analysis.
  • Support silicon bring-up, debug, characterization, and production test activities.
  • Collaborate closely with Design, Verification, Physical Design, and Product Engineering teams throughout the development lifecycle.

Required Qualifications

5+ years of hands-on experience in Design for Test (DFT).
  • Strong expertise in Scan, Scan Compression, MBIST, LBIST, ATPG, and JTAG technologies.
  • Solid understanding of IEEE 1149.1, IEEE 1500, and IEEE 1687 (IJTAG) standards.
  • Experience with one or more industry-standard DFT tools:
    • Synopsys TestMAX / DFT Compiler
    • Siemens Tessent
    • Cadence Modus
  • Proficiency in Verilog and/or SystemVerilog.
  • Scripting experience using Python, Perl, Tcl, or Shell.
  • Preferred Qualifications
  • Experience with ASIC/SoC development.
  • Background in silicon bring-up, debug, and production test.
  • Strong problem-solving skills and the ability to work effectively in cross-functional engineering teams.

If you're passionate about developing robust DFT solutions for advanced semiconductor products, we'd love to hear from you.

Compensation: $65.00 - $130.00 per hour

About Us

We work to deliver profitability in your business - with effective communication, consulting, and interactive solutions. Following an Agile Work Approach, we make sure you get the ideal solutions at minimum expenses.

Work Approach

Our Philosophy
Our Philosophy starts-and-ends at the Client-first approach. Be it understanding your business requirements to choosing the right technologies, we work as a collective team that takes all the possible steps to grow continuously towards our common goal.

Work Policy

We promote a collaborative work environment. We involve everyone working in the organization in community decisions and encourage them to think from a broader perspective. Our work process promotes flexibility and we maintain a high level of discipline at different levels of execution.

The Future

SelectMinds have years of experience in the domain helps us understand the need-of-the-hour better. This understanding drives us to a better future with every minute ticking. We believe we will be taking off major businesses from their flagship positions, with the products we are eyeing today.
Employers have access to artificial intelligence language tools (“AI”) that help generate and enhance job descriptions and AI may have been used to create this description. The position description has been reviewed for accuracy and Dice believes it to correctly reflect the job opportunity.
  • Dice Id: RTX1d4a85
  • Position Id: bb730c117871033d460d60c4c8a55573
  • Posted 4 days ago
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