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Senior DFT Engineer

Santa Clara, CA, US • Posted 9 hours ago • Updated 18 minutes ago

Full Time

On-site

USD130000.0/ANNUAL - USD150000.0/ANNUAL

Fitment

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🔢 Crunching numbers...

Job Details

Skills

WebKit
System On A Chip
ASIC
Testing
Debugging
MBIST
IO
Test Methods
Digital Design
RTL
DFT
ATPG
EDA
Data Analysis
Semiconductors
Configuration Management
Change Management
Content Management
SANS
Analytical Skill
Problem Solving
Conflict Resolution
Communication

Summary

Job Description:

5+ years of hands-on experience in DFT and ATPG for SoC or ASIC designs
Strong understanding of DFT fundamentals including controllability, observability, and scan-based testing
Proven expertise in ATPG pattern generation, analysis, and debug
Experience with MBIST, including memory test architectures and diagnostics
Knowledge of IO Test methodologies for interface and pin level validation
Solid understanding of clock DFT and clock verification concepts
Strong grasp of digital design and RTL fundamentals
Experience with industry standard DFT/ATPG EDA tools
Ability to work effectively in fast paced, high performance semiconductor programs
Strong analytical, problem solving, and communication skills

Employers have access to artificial intelligence language tools (“AI”) that help generate and enhance job descriptions and AI may have been used to create this description. The position description has been reviewed for accuracy and Dice believes it to correctly reflect the job opportunity.

Dice Id: 10365788
Position Id: W3GEXT-63668
Posted 9 hours ago

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