
Tanisha Systems, Inc.
San Jose, California • 17d ago
Easy Apply
Third Party, Contract
Depends on Experience
27 results (2 new)

Tanisha Systems, Inc.
San Jose, California • 17d ago
Easy Apply
Third Party, Contract
Depends on Experience

Reveille Technologies
Mountain View, California • 2d ago
Easy Apply
Full-time, Third Party
Depends on Experience

Goldenpick Technologies LLC
San Jose, California • Today
Easy Apply
Contract, Third Party
Depends on Experience

select minds
Santa Clara, California • Today
Full-time
Compensation information provided in the description

ComTec Information Systems
Hybrid in Santa Clara, California • 11d ago
Easy Apply
Contract
Depends on Experience








E-Solutions, Inc.
Santa Clara, California • Yesterday
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Full-time, Third Party
Depends on Experience




| Shivam Maheshwari Talent Acquisition Manager, Tanisha Systems Inc ISO Certified Company{ ISO 9001:2015} Office: Email: Address:99 Wood Ave South, Suite # 308, Iselin, NJ 08830 |
🔢 Crunching numbers...
San Jose, California
•
Today
Position : DFT Engineer Location : Austin,TX / San Jose,CA Duration : Long-term contract The Role We are seeking highly skilled and motivated Senior/Staff DFT (Design for Test) Engineers with a strong focus on high-performance digital design to take end-to-end ownership of robust, testable silicon, from early test strategy definition to verified DFT implementation, pattern generation, and silicon bring-up. You will join a multidisciplinary group creating next-generation accelerators where
Easy Apply
Contract, Third Party
Depends on Experience
Hybrid in Santa Clara, California
•
11d ago
Title: Design for Test (DFT) Engineer Location: Hybrid (Travel to Santa Clara) Duration: 1year Key Skills & Experience 3+ years of experience working as a DFT Engineer.Hands-on experience with the Siemens Tessent (Mentor Graphics) DFT tool suite.Strong understanding of DFT fundamentals, including controllability, observability, scan insertion, and scan-based testing.Expertise in ATPG (Automatic Test Pattern Generation), including pattern generation, analysis, debugging, and fault coverage improv
Easy Apply
Contract
Depends on Experience
Santa Clara, California
•
3d ago
Hi, Job Title : Senior DFT Engineer [ATPG , MBIST, IO Test, Clock Verification] Location : Santa Clara, CA Experience : 4+ Years in DFT Required Skills & Qualifications 4+ years of hands-on experience in DFT and ATPGfor SoC or ASIC designsStrong understanding of DFT fundamentalsincluding controllability, observability, and scan-based testingProven expertise in ATPG pattern generation, analysis, and debugExperience with MBIST, including memory test architectures and diagnosticsKnowledge of IO Tes
Easy Apply
Contract
Depends on Experience
San Jose, California
•
Today
Please Note: 1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account) 2. If you already have a Candidate Account, please Sign-In before you apply. Job Description: The Full Chip Static Timing Analysis (STA) Engineer is responsible for ensuring that ASIC meets its performance targets and timing requirements across all operating conditions. Key Responsibilities: Full-Chip Timing Sign-off: Own the final timing clos
Full-time
USD 143,800.00 - 230,000.00 per year