Overview
Skills
Job Details
Job Title: IP Design Engineer
Work Location: 100% Remote
Interview: Via MS Teams
Client is looking for someone who can work on W2 / Independent Visa Holders
Job Duties:
Develop soft IP for FPGAs using Verilog/SystemVerilog.
Integrate third-party IP cores into FPGA systems, create custom RTL wrappers, and interface with IP vendors.
Collaborate with Verification Engineers to verify IP functionality and debug issues.
Participate in board bring-up and system-level integration activities.
Experience and Education:
7 to 12 years of digital design experience.
Proficient in RTL coding with Verilog and/or SystemVerilog.
Strong background in digital design, microarchitecture, and RTL development.
Hands-on experience with Xilinx FPGAs and Vivado design tools.
Experience in video domain protocols such as DisplayPort, MIPI, HDMI, SDI is preferred.
Demonstrated success designing advanced standard and proprietary high-speed interface IPs/solutions.
Sound understanding of system design and its impact on performance and throughput.