FPGA/Design Verification Engineer - ADPMN Inc - mountain view, CA, US | Dice.com

Hardware/FPGA/Design Verification Engineer (Mountain View, CA)

Mountain View, California

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Today

Job Title: Hardware/FPGA/Design Verification Engineer Location: Mountain View, CA (Onsite)Duration: 12+ Months Job Description Strong understanding of FPGA design principles and architectures. Proficiency in System Verilog and UVM verification methodology. Experience with industry-standard verification tools (e.g., QuestaSim, Synopsys VCS). Knowledge of code coverage and functional coverage analysis. Excellent debugging and problem-solving skills. Strong communication and collaboration skills.

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Contract

Depends on Experience

FPGA Verification Engineer @ Mountain View, CA (Onsite)

Mountain View, California

•

Yesterday

Job Description Strong understanding of FPGA design principles and architectures. Proficiency in System Verilog and UVM verification methodology. Experience with industry-standard verification tools (e.g., QuestaSim, Synopsys VCS). Knowledge of code coverage and functional coverage analysis. Excellent debugging and problem-solving skills. Strong communication and collaboration skills. Requirements Bachelor s or master s degree in electrical engineering, Computer Engineering, or a related field.

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Third Party, Contract

Depends on Experience

FPGA Verification Engineer

Santa Clara, California

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Yesterday

Role: FPGA Verification Engineer Location: Santa Clara, CA - Onsite Duration: 12+ Months Contract Must Have Skills - Skill 1 8 + Years of in FPGA Skill 2 5 +Years of Exp in UVM Skill 2 5 +Years of Exp in System Verlilog Job Description: We are seeking a highly motivated and skilled FPGA Verification Engineer to join our dynamic team. In this role, you will be responsible for the verification of complex FPGA designs, ensuring their functionality, performance, and reliability. You will work close

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Contract, Third Party

$60 - $70

FPGA Verification Engineer

Santa Clara, California

•

Today

FPGA Verification Engineer Santa Clara, CA- 5days onsite Mandatory Areas Must Have Skills FPGA Verification Engineer Skill 1 8 + Years of in FPGA Skill 2 5 +Years of Exp in UVM Skill 2 5 +Years of Exp in System Verlilog Job Description: We are seeking a highly motivated and skilled FPGA Verification Engineer to join our dynamic team. In this role, you will be responsible for the verification of complex FPGA designs, ensuring their functionality, performance, and reliability. You will work

Full-time, Contract, Third Party

FPGA/Design Verification Engineer

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