FPGA Verification Engineering
Santa Clara, CA, US • Posted 6 hours ago • Updated 6 hours agoFull Time
On-site
Depends on Experience
Fitment
Dice Job Match Score™
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Job Details
Skills
- FPGA
- system verilog
- UVM
- Verification Exp
- Verilog cluster server
- Verilog
Summary
Mandate Skills:
FPGA
Verification Exp
Strong SystemVerilog coding
(Universal Verification Methodology)-UVM
- 5+ years of FPGA verification experience
- Strong SystemVerilog programming skills
- Hands-on experience with UVM (Universal Verification Methodology)
- Familiarity with industry-standard verification tools (e.g., QuestaSim, Synopsys VCS)
- Experience with code and functional coverage analysis
- Proficient in debugging and problem-solving
- Scripting experience in Python or Perl
- Knowledge of Verilog and/or VHDL
Employers have access to artificial intelligence language tools (“AI”) that help generate and enhance job descriptions and AI may have been used to create this description. The position description has been reviewed for accuracy and Dice believes it to correctly reflect the job opportunity.
- Dice Id: 91052859
- Position Id: 8829039
- Posted 6 hours ago
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