rtl design engineer Jobs in california

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RTL design Engineer

Mirafra Inc

San Jose, California, USA

Full-time

Job Description: Strong Logic Design, RTL coding (Verilog HDL) and debugging skills Analyze and resolve Lint, CDC and RDC issues in the design Understanding of low power design and validation techniques including UPF Experience with constraint generation, timing closure analysis, formal verification, low power checks using UPF flows and ECO implementation. Experience with writing assertions and doing negative checks to validate assertions Experience with Silicon validation/Bring-up Experience w

RTL Design Engineer

Dexian DISYS

Mountain View, California, USA

Contract

We are looking for an RTL Design Engineer with a strong background in digital design and SoC development to join our dynamic hardware team. The ideal candidate will bring deep expertise in AXI protocol integration, CDC/RDC analysis, and IP development to drive successful SoC tapeouts. You will work closely with architecture, verification, and physical design teams to deliver high-quality RTL for cutting-edge imaging and video processing systems. Top 3 Hard Skills Required + Years of Experience

DFX RTL Design Engineer - Specialized (US)

Sunrise Systems, Inc.

Santa Clara, California, USA

Contract

DFX RTL Design Engineer - Specialized (US) Santa Clara, CA - 95054 6 Months candidate must be able to come onsite to San Jose, CA 3 days per week OB DUTIES: This is a position for senior level RTL design engineer. As a part of the design team, candidate will be exposed to several IPs including Gbit SERDES, UCIe, PCIe I/F & high frequency design. Successful candidates will be participating in the DFX RTL coding/integration of leading edge I/O SoC in 3 nm processes. This DFX RTL Design Engineer

RTL Design Engineer

Yoh - A Day & Zimmerman Company

Santa Clara, California, USA

Full-time

RTL Design Engineer Looking for a solid RTL Design Engineer who has a strong background in supporting RISC-V houses. The primary technology will be focused around SOCs that are built around ML Accelerators. This person should have a solid background in RTL Design and also have an understanding of verification flows. This person should be a strong engineer and be able to come in and provide solid and consistent support with minimal hand holding or guidance. Required 7+ Years of RTL Design experi

ASIC/RTL Design Engineer - Senior at San Jose, CA

Infobahn Softworld Inc.

Santa Clara, California, USA

Contract, Third Party

TOP 3 SKILLS: Good understanding of SystemVerilog, analyzing existing designs and making modifications, able to understand tools used by ASIC engineers like Lint, CDC, STA, etc. - scripting is nice to have KEY RESPONSIBILITIES: Write micro-architecture documentation and own major portions of the design and implementation of blocks to meet functional, timing, area, and power requirements. Collaborate with architecture and hardware teams to understand the requirements. Work with verification and p

RTL Engineer

Cloudious

Santa Clara, California, USA

Third Party, Contract

In-Person Interview Role: Integrate RISC-V Core to SoC Key Responsibilities Integrate RISC-V CPU cores into SoC designs, collaborating with cross-functional teams (DV, physical design, architecture, verification, and post-silicon validation) to ensure seamless delivery. Develop and optimize RTL (using Verilog/SystemVerilog) for core, interconnect, and memory subsystems. Evaluate and integrate third-party IP, ensuring performance, power, and area (PPA) targets are met. Debug complex RTL/logic i

Electrical Design Engineer (FPGA, RTL, DSP/image processing)

KLA

Milpitas, California, USA

Full-time

Company Overview KLA is a global leader in diversified electronics for the semiconductor manufacturing ecosystem. Virtually every electronic device in the world is produced using our technologies. No laptop, smartphone, wearable device, voice-controlled gadget, flexible screen, VR device or smart car would have made it into your hands without us. KLA invents systems and solutions for the manufacturing of wafers and reticles, integrated circuits, packaging, printed circuit boards and flat panel d

Direct Client : "Design Engineer " Position @ San Jose CA

Infobahn Softworld Inc.

Santa Clara, California, USA

Contract, Third Party

Job Title: ASIC/RTL Design Engineer Primary Skills : RTL coding, TCL coding, Python coding, understanding of different CAD tools (synthesis, lint, CDC, RDC, PrimeTime). Location: San Jose CA Duration : 12+ Months Job Description: Location: San Jose - Onsite Interviews: Interviews will be online. Two interviews. Top skills: RTL coding, TCL coding, Python coding, understanding of different CAD tools (synthesis, lint, CDC, RDC, PrimeTime). JOB DUTIES: The work will expose the designer to a nu