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Job Details

Skills

DFT
Siemens Tessent
ATPG
MBIST

Summary

Title: Design for Test (DFT) Engineer

Location: Hybrid (Travel to Santa Clara)

Duration: 1year

Key Skills & Experience

3+ years of experience working as a DFT Engineer.
Hands-on experience with the Siemens Tessent (Mentor Graphics) DFT tool suite.
Strong understanding of DFT fundamentals, including controllability, observability, scan insertion, and scan-based testing.
Expertise in ATPG (Automatic Test Pattern Generation), including pattern generation, analysis, debugging, and fault coverage improvement.
Experience with MBIST (Memory Built-In Self-Test), including memory test architecture, implementation, and diagnostics.
Good knowledge of IO Test methodologies for interface and pin-level validation.
Strong understanding of Clock DFT and clock verification concepts.
Solid foundation in Digital Design and RTL (Verilog/SystemVerilog).
Experience with industry-standard DFT/ATPG EDA tools.
Experience in verification of DFT features, including Boundary Scan (JTAG), IJTAG, MBIST, High-Speed Scan Testing, and other DFT methodologies.
Excellent analytical, debugging, and problem-solving skills.

Employers have access to artificial intelligence language tools (“AI”) that help generate and enhance job descriptions and AI may have been used to create this description. The position description has been reviewed for accuracy and Dice believes it to correctly reflect the job opportunity.

Dice Id: 10121335
Position Id: 9032323
Posted 2 days ago

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Srini Reddy

Account Manager / Recruitment Specialist @ ComTec Information Systems

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Design for Test (DFT) Engineer

Skills

Summary

Dice Job Match Score™

Srini Reddy

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Job Details

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