DFT Engineer

Hello, Good afternoon, I'm Rahul from Floga Technologies. We are a growing IT services organization delivering scalable technology solutions and are expanding our team with qualified talent. We have an immediate opening for a DFT (Design for Test) Engineer with strong hands-on experience to support a long-term engagement with our client. Must collaborate effectively with cross-functional teams to deliver high-quality solutions. Title: DFT (Design for Test) Engineer Location: santa cla

Title: Design for Test (DFT) Engineer Location: Hybrid (Travel to Santa Clara) Duration: 1year Key Skills & Experience 3+ years of experience working as a DFT Engineer.Hands-on experience with the Siemens Tessent (Mentor Graphics) DFT tool suite.Strong understanding of DFT fundamentals, including controllability, observability, scan insertion, and scan-based testing.Expertise in ATPG (Automatic Test Pattern Generation), including pattern generation, analysis, debugging, and fault coverage improv

Title: DFT Engineer (ATPG & SSN Streaming Scan Network) Location: San Jose, CA Experience: 10+ years Duration: 12+ months contract Key Responsibilities: DFT implementation including Scan, ATPG, simulations, and post-silicon diagnosis at block and SoC levelsVerify test patterns using gate-level simulationsCollaborate with Synthesis, STA, and Physical Design teams to resolve DFT issuesPartner with test engineers during silicon bring-upHands-on experience with Synopsys TetraMAX, VCS, Verdi, and DC/

Hello Professional, Good Afternoon Please find the job description give below, if interested please share me your most updated copy of resume. Role: Lead ASIC DFT Engineer Work Setup: Remote, PST time zone preferred Experience Required:10+ years of hands-on experience in ASIC Design-for-Test (DFT) Role Summary: We are seeking a highly experienced Lead ASIC DFT Engineer to architect, implement, verify, and debug advanced DFT solutions for complex ASIC and SoC designs. This role requires deep tec