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Digital Verification Engineer

Neuralink

South San Francisco, California • Today

Full-time

USD 131,000.00 - 243,000.00 per year

Verification Engineer in CA and TX

E-Solutions, Inc.

San Francisco, California • 30+d ago

Easy Apply

Third Party, Contract

Depends on Experience

Staff Engineer - Processor Verification and Compiler Validation

Enphase Energy

Fremont, California • Today

Full-time

USD 120,000.00 - 183,600.00 per year

Sr. Staff Engineer - Processor Verification and Compiler Validation

Enphase Energy

Fremont, California • Today

Full-time

USD 135,000.00 - 205,200.00 per year

Sr. FPGA Verification Engineer

Reliable Robotics

Remote or Mountain View, California • Today

Full-time

USD 215,000.00 - 300,000.00 per year

ASIC/FPGA Design and Verification Engineer - Space Electronics - (Senior or Principal) - MTV

Boeing Company

Mountain View, California • Today

Full-time

USD 164,900.00 - 223,100.00 per year

Senior Digital Key Engineer

VeridianTech

Palo Alto, California • Today

Easy Apply

Contract, Third Party

Senior Digital Key Engineer

S3 Staffing USA

Palo Alto, California • 22d ago

Easy Apply

Contract

$60 - $70

Senior Digital Key Engineer

S3 Staffing USA

Palo Alto, California • 22d ago

Easy Apply

Contract

$60 - $70

DV IP Design Verification Engineer

Metalight Solutions Inc

Remote • Today

Easy Apply

Contract

Depends on Experience

SoC verification Engineer

Saim Technologies

Remote • Today

Easy Apply

Contract

$70+

Sr. FPGA Verification Engineer, Radar

Reliable Robotics

Remote or Seattle, Washington • Today

Full-time

USD 215,000.00 - 300,000.00 per year

Digital Engineering Manager

Istari Digital

Remote • Today

Full-time

USD 145,000.00 - 215,000.00 per year

Senior Backend Engineer - Workforce Verification

Socure

Remote • Today

Full-time

USD 180,000.00 - 210,000.00 per year

Mixed-Signal Verification Engineer

Apple, Inc.

San Francisco, California • Today

Full-time

Software Engineer, Verifications Platform

Upstart

Remote • Today

Full-time

Compensation information provided in the description

Digital Hardware Engineer

Apple, Inc.

Sunnyvale, California • Today

Full-time

Job Details

Skills

Business Intelligence
Recovery
CPU
System On A Chip
Art
Interfaces
FOCUS
Digital Signal Processing
ASIC
Scripting
Python
Perl
Makefile
Tcl
Unix
Shell
Code Coverage
Regression Analysis
RTL
Physical Data Model
Testing
Integrated Circuit
Modeling
SystemVerilog
SystemC
C++
Formal Verification
UVM
ARM
AMBA
FPGA
Emulation
Writing
Debugging
Training
Insurance
PPO

Summary

About Neuralink:

We are creating devices that enable a bi-directional interface with the brain. These devices allow us to restore movement to the paralyzed, restore sight to the blind, and revolutionize how humans interact with their digital world.

Job Description & Responsibilities:

We are looking for ASIC Design Verification Engineers with strong CPU, ASIC design and verification fundamentals to work in Neuralink's System-on-Chip (SoC) department under the Implant Team. This position offers a rare and unique opportunity to have a high impact in realizing state-of-the-art brain-computer interfaces. The team delivers architecture and logic implementation of digital modules with a strong focus in high-throughput low-power digital signal processing (DSP) . We have crafted a team of exceptional engineers whose mission is to push the frontiers of what is possible today and define the future.

Key qualifications:

Minimum 3 years of experience in digital ASIC verification.
Excellence in SystemVerilog.
Experience in developing automation flow and scripts such as Python, Perl, Makefile, Tcl and UNIX shell
Experience with code coverage and regression setup.

Preferred qualifications:

Experience working on complex digital systems from architecture, microarchitecture, RTL, verification and physical design using industry standard tools.
Experience on building test benches, testing, and debugging for a complex system-on-chip.
Experience in formal verification.
Functional modeling experience and logic verification with SystemVerilog, SystemC/C++.
Experience with IEEE-1801 (UPF) based design simulation flows
Experience with low power gate level simulations
Exposure with low power formal verification flows
Strong hands-on experience in verification methodologies such as UVM
Knowledge of ARM/RISC-V processor, AMBA bus
Knowledge of power aware verification
Experience with FPGA/emulation
Experience with lab system bring up, writing diagnostic, and lab debugging

Expected Compensation:

The anticipated base salary for this position is expected to be within the following range. Your actual base pay will be determined by your job-related skills, experience, and relevant education or training. We also believe in aligning our employees' success with the company's long-term growth. As such, in addition to base salary, Neuralink offers equity compensation (in the form of Restricted Stock Units (RSU)) for all full-time employees.

Base Salary Range:

$131,000-$243,000 USD

What We Offer:

Full-time employees are eligible for the following benefits listed below.

An opportunity to change the world and work with some of the smartest and most talented experts from different fields
Growth potential; we rapidly advance team members who have an outsized impact
Excellent medical, dental, and vision insurance through a PPO plan
Paid holidays
Commuter benefits
Meals provided
Equity (RSUs) *Temporary Employees & Interns excluded
401(k) plan *Interns initially excluded until they work 1,000 hours
Parental leave *Temporary Employees & Interns excluded
Flexible time off *Temporary Employees & Interns excluded

Employers have access to artificial intelligence language tools (“AI”) that help generate and enhance job descriptions and AI may have been used to create this description. The position description has been reviewed for accuracy and Dice believes it to correctly reflect the job opportunity.

Dice Id: RTX1d0651
Position Id: b6b56e47fc77e51a44a096deb1f38155
Posted 30+ days ago

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San Jose, California

•

Today

Principal Engineer, Digital Verification & Emulation Location: San Jose, CA - on-site Ayar Labs is shattering AI data bottlenecks by moving data at the speed of light. As pioneers of co-packaged optics, or CPO, we are using light instead of electricity to move data faster, further, and with a fraction of the energy needed to fuel the explosive growth of AI models. Backed by industry leaders including NVIDIA, AMD, MediaTek and Intel, and manufactured in partnership with the world's leading semi

Full-time

USD 190,000.00 - 250,000.00 per year

ASIC/FPGA Design and Verification Engineer - Space Electronics - (Senior or Principal) - MTV

Mountain View, California

•

Today

ASIC/FPGA Design and Verification Engineer - Space Electronics - (Senior or Principal) - MTV Company: The Boeing Company Boeing Space, Intelligence & Weapons Systems has an exciting opportunity for multiple ASIC/FPGA Design and Verification Engineers (Senior or Principal) to join us as part of our Boeing Electronic Products team at the heart of Boeing's products; ASICs and FPGAs in Mountain View, CA. From complex digitally beamformed phased arrays for constellation satellite programs to comput

Full-time

USD 164,900.00 - 223,100.00 per year

ASIC Verification Engineer

Santa Clara, California

•

2d ago

ASIC Verification Engineer Verification Engineer 3Location: Santa Clara, CA 95054 Contract: 12+ Months Candidate Pay: $75/HR on W2 Job OverviewWe are seeking an experienced ASIC Verification Engineer Verification Engineer 3 to join our semiconductor engineering team in Santa Clara, CA. The ideal candidate will have strong hands-on experience in block-level functional verification of complex CPU/GPU SoCs, with expertise in simulation, SystemVerilog, Verilog, and C/C++ development in a Linux env

Easy Apply

Contract

Depends on Experience

ASIC Verification Engineer

San Jose, California

•

Today

At Cornelis we're building the future of AI and HPC networking with an AI-first approach to silicon and software development. We're seeking engineers who are energized by working on cutting-edge ASIC design and distributed software systems, and who are motivated to push the boundaries on how AI can transform everything from chip architecture to system performance at scale. Cornelis Networks delivers the world's highest performance scale-out networking solutions for AI and HPC datacenters. Our d

Full-time