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DESIGN VERIFICATION ENGINER _ FULLTIME

SUNRAY INFORMATICS

Sunnyvale, California • Today

Easy Apply

Full-time

Depends on Experience

SR PHYSICAL DESIGN ENGINEER _ FULL TIME

SUNRAY INFORMATICS

Sunnyvale, California • Today

Easy Apply

Full-time

Depends on Experience

Design Verification Engineer

Inabia Software & Consulting Inc.

San Jose, California • 2d ago

Easy Apply

Contract, Third Party

Depends on Experience

Pre-Silicon Digital Verification Engineer

Apple, Inc.

Sunnyvale, California • Today

Full-time

IC Verification Engineer

Broadcom Corporation

San Jose, California • Today

Full-time

USD 143,800.00 - 230,000.00 per year

Design Verification Engineer

Reveille Technologies

San Jose, California • Today

Easy Apply

Full-time

Depends on Experience

Design Verification Engineer

SIGNin Solutions Inc.

San Jose, California • 3d ago

Easy Apply

Full-time, Third Party

Depends on Experience

Formal Design Verification Engineer

NUBYT, INC.

San Jose, California • 4d ago

Easy Apply

Contract, Third Party

85 - 95

Design Verification Engineer

MSH Group

Remote • Today

Easy Apply

Contract

40 - 50

Engineering Intern - Design Verification, Neural Engine (Spring 2027 Co-op)

Rivian

Palo Alto, California • Today

Full-time

USD 45.00 - 51.00 per hour

ASIC Design Verification Engineer - W2 Contract

XFORIA Inc

Menlo Park, California • Today

Easy Apply

Contract

Depends on Experience

Senior Debug Verification Engineer

Altera Corp.

San Jose, California • Today

Full-time

USD 149,100.00 - 215,000.00 per year

Principal Verification Engineer

Astera Labs

San Jose, California • Today

Full-time

USD 185,000.00 - 230,000.00 per year

Verification Engineer 5

TPI Global (formerly Tech Providers, Inc.)

San Jose, California • Today

Full-time

Senior Staff Formal Verification Applications Engineer

Synopsys, Inc.

Sunnyvale, California • Today

Full-time

Verification Engineer ASIC/CPU/GPU Functional Verification

VGAI Solutions Inc

San Jose, California • 2d ago

Easy Apply

Contract

75 - 80

DV (Design Verification) Engineer (California, Texas) - W2 Only

Collaborate Solutions, Inc.

San Jose, California • 3d ago

Easy Apply

Full-time

$60 - $70

Senior Physical Verification CAD Engineer

Microsoft Corporation

Mountain View, California • Today

Full-time

USD 119,800.00 - 234,700.00 per year

Formal Verification Engineer - #26-21752

U.S. Tech Solutions Inc.

Ben Lomond, California • 14d ago

Easy Apply

Contract

$80 - $85

Digital Verification Engineer

Neuralink

South San Francisco, California • Today

Full-time

USD 131,000.00 - 243,000.00 per year

Principal Engineer, Digital Verification and Emulation

Ayar Labs

San Jose, California • Today

Full-time

USD 190,000.00 - 250,000.00 per year

Early Careers: Verification Engineer

Fortinet

Sunnyvale, California • Today

Full-time

USD 110,400.00 - 184,000.00 per year

Verification Engineer

Broadcom Corporation

San Jose, California • Today

Full-time

USD 121,900.00 - 195,000.00 per year

Verification Engineer - Aeromechanical (Design & Test)

Pivotal

Palo Alto, California • Today

Full-time

USD 115,000.00 - 145,000.00 per year

Design Verification Engineer (Einfochips)

Arrow Electronics, Inc.

San Jose, California • Today

Full-time

Staff Engineer, Design Verification

Micron Technology, Inc.

San Jose, California • Today

Full-time

USD 120,000.00 - 252,000.00 per year

Senior Staff Engineer, Design Verification

Samsung Electronics America

San Jose, California • Today

Full-time

USD 189,000.00 - 301,000.00 per year

FPGA Verification Engineer - Mountain View, CA- HYBRID

SR Partners LLC

Mountain View, California • Today

Easy Apply

Contract, Third Party

$$60-120/ hr C2C/1099

FPGA Verification Engineer

Inherent Technologies

Santa Clara, California • Today

Easy Apply

Third Party, Contract

Hiring: Staff / Sr Staff SoC Clock Design Engineer Saratoga, CA | Full-Time | 7nm & Below

VortexLink

Saratoga, California • 21d ago

Easy Apply

Full-time

Depends on Experience

Job Details

Skills

DESIGN VERIFICATION ENGINEER
VERILOG
C++
UVM
AI
NETWORKING

Summary

TITLE: SR DESIGN VERIFICATION ENGINEER

LOCAITON: SUNNYVALE,CA (ONSITE)

FULL TIME

Senior Design Verification Engineer with 10+ years of experience who has strong hands-on expertise in SystemVerilog, UVM, Verilog, and digital design verification. The candidate should be capable of developing verification plans and testbenches, performing IP/SoC-level verification, debugging design issues, and driving functional and code coverage to closure. Experience with Python/Perl scripting and EDA tools is required. Exposure to AI/ML, Networking, Video, ARM/RISC-V, or Data Center designs is an added advantage.

Mandatory Skills:

Verilog, SystemVerilog
UVM/OVM methodology
IP/Sub-system/SoC verification
Testbench development and functional verification
Functional and code coverage
Debugging and root-cause analysis
EDA tools and Python/Perl/Shell scripting
BEST REG
NAVEEN
)
EMAIL(:) NAVEEN AT SUNRAYINFORMATICS DOT COM

Employers have access to artificial intelligence language tools (“AI”) that help generate and enhance job descriptions and AI may have been used to create this description. The position description has been reviewed for accuracy and Dice believes it to correctly reflect the job opportunity.

Dice Id: 10430719
Position Id: 9136310
Posted 9 hours ago

Fitment

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Naveen Pulletikurthi

Recruiter @ SUNRAY INFORMATICS

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More jobs at SUNRAY INFORMATICS in Sunnyvale, CA

Job Details

Skills

DESIGN VERIFICATION ENGINEER
VERILOG
C++
UVM
AI
NETWORKING

Summary

TITLE: SR DESIGN VERIFICATION ENGINEER

LOCAITON: SUNNYVALE,CA (ONSITE)

FULL TIME

Mandatory Skills:

Verilog, SystemVerilog
UVM/OVM methodology
IP/Sub-system/SoC verification
Testbench development and functional verification
Functional and code coverage
Debugging and root-cause analysis
EDA tools and Python/Perl/Shell scripting
BEST REG
NAVEEN
)
EMAIL(:) NAVEEN AT SUNRAYINFORMATICS DOT COM

Dice Id: 10430719
Position Id: 9136310
Posted 9 hours ago

Fitment