Client Job Title: FPGA Design Verification Engineer
Job Title: Technical Lead II - VLSI
Location: Santa Clara, CA
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The Opportunity: We are seeking a highly motivated and skilled FPGA Verification Engineer to join our dynamic team, working on state of the art technologies.
In this role, you will be responsible for the verification of complex FPGA designs, ensuring their functionality, performance, and reliability.
You will work closely with design engineers to develop and execute verification plans, identify and debug issues, and contribute to the overall quality of our products. Key Responsibilities:
Create and maintain test benches using industry-standard verification methodologies (e.g., UVM, System Verilog, RTL).
Write and debug test cases to verify functionality, performance, and corner cases.
Identify and debug issues, working closely with design engineers to resolve them.
Participate in design reviews and contribute to the overall verification strategy. Stay up-to-date with the latest verification methodologies and tools. Required Skills:
Strong understanding of FPGA, ASIC, RTL design principles and architectures.
Proficiency in System Verilog and UVM verification methodology.
Experience with Linux operating system.
Experience with industry-standard verification tools (e.g., QuestaSim, Synopsys VCS, Haps).
Experience with high-speed I/O design and protocols. Knowledge of PCIe, I2C, SPI, etc.
Hands on experience with lab debugging tools including logic analyzer, oscilloscope, and JTAG.
Excellent debugging and problem-solving skills.
Strong communication and collaboration skills.
Desired Skills:
Experience in hardware validation or embedded test automation
Experience with scripting languages (e.g., Python, Perl).
Qualification:
Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field.
10+ years of experience in FPGA design or verification.
Familiarity with hardware description languages (e.g., VHDL, Verilog). What we believe:
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