Lead ASIC DFT Engineer

Job Title :          Lead ASIC DFT Engineer

Location:           Remote (Must work in PST hours)

We are looking for an experienced Lead ASIC DFT Engineer with 10+ years of experience in end-to-end DFT implementation for complex ASIC and SoC designs.

Required Skills:

• ASIC Design for Test (DFT)
• SCAN Insertion and Scan Compression
• ATPG
• MBIST and LBIST
• Timing Simulations
• SDF and SDC
• Pattern Retargeting and Pattern Porting
• Diagnosis and DRC Analysis
• TetraMax and DFTMax
• JTAG, Boundary Scan, iJTAG
• Silicon Bring-up and Post-Silicon Debug
• Synopsys, Cadence, and Siemens/Mentor Tools
• TCL, PERL, or Python Scripting
• Experience with Large ASIC/SoC Designs

The ideal candidate should have strong ownership of DFT architecture, implementation, verification, debug, and post-silicon validation activities.