Job Title: DFT Engineers
Location: Santa Clara, CA
Duration: 12 Months
Required Skills & Qualifications
- 5+ years of hands-on experience in DFT and ATPG for SoC or ASIC designs
- Strong understanding of DFT fundamentals including controllability, observability, and scan-based testing
- Proven expertise in ATPG pattern generation, analysis, and debug
- Experience with MBIST, including memory test architectures and diagnostics
- Knowledge of IO Test methodologies for interface and pin level validation
- Solid understanding of clock DFT and clock verification concepts
- Strong grasp of digital design and RTL fundamentals
- Experience with industry standard DFT/ATPG EDA tools
- Ability to work effectively in fast paced, high performance semiconductor programs
- Strong analytical, problem solving, and communication skills
Qualifications:
- Familiarity with the Siemens suite of DFT tools
- DFT insertion for SCAN (with SSN) and MBIST
- MBIST Repair Implementation and Verification
- Generating collaterals for Test Timing and Place and Route
- Expertise in IJTAG 1687 standard and good at understanding ICL and PDL standard Spec
- Verification of DFT features, including
- Boundary Scan
- JTAG
- SCAN
- MBIST
- High Speed IO
Key Skills: DFT, ATPG, Scan Insertion, MBIST Repair Implementation & Verification, IJTAG (IEEE 1687), DFT Feature Verification, SoC / ASIC Design, Siemens Tessent
About VDart Group
VDart Group is a global leader in technology, product, and talent solutions, serving Fortune 500 clients in 13 countries. With over 4,000 professionals worldwide, we deliver innovation, operational excellence, and measurable outcomes across industries. Guided by our commitment to People, Purpose, and Planet, VDart is recognized with an EcoVadis Bronze Medal and as a UN Global Compact member, reflecting our dedication to sustainable practices.
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